Replacing Via in Pad With an Ordinary Via: When It Pays

A via placed inside a component pad is one of the more expensive features a board can carry, and it is often specified for good reasons. It shortens the path from a ball or a land to the layer beneath it, removes the stub that a through via would leave, and makes it possible to escape arrays whose pitch leaves no room for routing beside each pad.

It is also specified by habit in places where none of those reasons apply. Where that happens, replacing it with an ordinary via is one of the few design changes that reduces cost without touching performance.

What Via in Pad Costs to Build

The expense is not in drilling the hole; it is in what has to happen afterwards.

The hole is drilled and plated, and then it has to be filled. The filling, usually described as resin plugging, uses a resin or a conductive paste, and the material has to be cured, which is a separate process step with its own temperature profile and its own risk of voids. The surface then has to be planarised so that the pad is flat, because a filled hole that is not flush leaves a depression that changes how paste is deposited and how the joint forms. Planarising removes copper from the surface, and the copper removed has to be accounted for in the plating step earlier in the process. At the end, the overfill and any residue are cleaned off before the rest of the board is processed.

Each of those steps is real process time, real material and a real yield risk. The consequence is that a board with vias in pads is priced noticeably above the same board with ordinary vias, and the difference grows with the number of filled holes.

What the Feature Buys

Three benefits justify it where they apply.

The first is escape density. On a fine-pitch array there is no room for both a trace and a via in the channel between pads, so the via goes into the pad and the trace leaves from the pad directly. Without that, the design needs more layers, which is usually more expensive than the filled vias.

The second is electrical. A via in the pad removes the short length of trace that would otherwise connect the pad to the via, and with it the stub that a through via would leave below the signal layer. On fast signals that stub is a resonance source, so the filled via is a performance feature rather than only a density one. What a reflection at such a discontinuity does to the channel is described in the note on the reflection coefficient and impedance.

The third is thermal. A via cluster inside a power pad is a direct path from the device into the copper beneath it, and filling those vias with a conductive material improves the path rather than merely making it manufacturable.

Where the Trade Can Be Made

The decision is per-net, not per-board. A single board commonly contains regions where the feature is essential and regions where it is decoration.

Low-frequency nets are the first candidate. A signal whose transitions are slow relative to the length of the via structure gains nothing measurable from removing a stub of a fraction of a millimetre, and the pad can therefore be served by an ordinary via placed beside it.

Areas that are not density-limited are the second. Where the layout has room to place a via outside the pad and route into it, the escape problem that justified the filled via does not exist, even if the surrounding area is dense elsewhere on the board.

Cost-sensitive products are the third, and the reasoning is simple: if a product is competing on price and its performance margin is comfortable, spending process cost on a feature that is not needed reduces competitiveness for no benefit.

Where It Cannot Be Given Up

The same reasoning identifies the regions that keep the feature.

Fine-pitch arrays cannot give it up, because the alternative is more layers and more area, and addressing that may not be possible at all within the board outline.

High-speed channels should not give it up where the through via would introduce a stub of electrically significant length. The magnitude depends on the rate and the thickness of the board; on a thick high-layer board a through via in a fast net is a genuine performance penalty.

Thermal pads should not give it up, because the via cluster there is a designed heat path rather than an escape convenience.

The distinction that matters is between the electrical function of the via and the mechanical convenience of its location. A via that is in the pad because that was the easiest place to put it is a candidate for a change; a via that is in the pad because the signal or the heat has to go through it is not.

Making the Change Without Introducing a Fault

Replacing vias is a design change, and a design change made late is a risk. The sequence that keeps it safe has five parts.

Assess the performance first. Identify the nets whose requirement is genuinely low, and confirm that the routing that replaces the filled via can be completed without crossing the layer or region the original design was protecting.

Then adjust the layout. Moving a via out of a pad changes the pattern around the pad, the paste aperture and the local copper. On fine geometry the new via also has to respect the clearance rules, which may mean it cannot be placed immediately beside the pad even though there is nominal room.

Then analyse the signals that were changed. The signal integrity check is not a formality: a net that was routed through a pad-mounted via has a different return path after the change, and a short stub now exists where none did. The check is whether the resulting channel still meets the requirement, not whether the net still connects.

Then confirm the process. The new via type has its own minimum size, its own annular ring requirement and its own drilling step, and the fabricator should confirm that the revised pattern is manufacturable before the data is released rather than after.

And then build a sample. A prototype run of the revised design, inspected at the joints that changed, answers the question directly and costs far less than discovering the consequence in a production batch.

The Cost Model That Matters

The comparison is not between one via type and another in isolation. It is between the total cost of each option.

Removing filled vias saves process cost per hole and reduces yield risk. If the change forces additional layers or a larger board to route what the vias were making possible, the saving is quickly exceeded, since each added layer brings its own drilling, lamination and plating cost. If the change is confined to areas where the routing was never constrained, the saving is real and the risk is small.

The same reasoning applies to the inspection side. Filled and capped vias under a pad are one of the structures that X-ray inspection exists to verify, since the joint above them cannot be seen optically. Reducing their number reduces the inspection burden as well.

Where the trade is being assessed, the layers and structures involved are worth reviewing against the fabricator’s stated capability: the note on via in pad for fine-pitch BGA covers the cases where the feature is required, and the layout quality checklist covers the checks that apply after a change of this kind.

FAQ

Does removing a via from a pad always save money? It saves process cost on the holes that change, but only if the routing that replaces them does not require extra layers or board area.

Is the change risky for signal quality? It changes the return path and introduces a stub where there was none. On slow nets the effect is negligible; on fast nets it has to be analysed rather than assumed.

Can some vias in a design be filled and others not? Yes, and that is the usual outcome. The decision is made per net, based on whether the via is there for electrical or thermal reasons or merely for convenience.