Ringing, Crosstalk and Reflections: Signal Integrity Fixes

Signal integrity stops being a background concern the moment edge rates get short enough that a trace behaves like a transmission line rather than a wire. Above that point the geometry of the routing decides whether a receiver sees a clean edge or a distorted one, and no amount of firmware effort recovers a signal that arrived with the wrong shape. The problems have consistent names, overshoot, undershoot, ringing, crosstalk, delay and skew, and each has a layout cause that can be designed out.

What Signal Integrity Problems Look Like

Overshoot and undershoot are the excursions beyond the supply rails that appear when a fast edge meets an impedance mismatch. Ringing is the oscillation that follows, decaying as the energy is dissipated, and it eats into the noise margin that the receiver needs. When ringing crosses the input threshold more than once the device can double clock, which is one of the harder faults to diagnose on a running board.

Delay and skew are the quieter problems. A route that is electrically longer than its neighbour delivers its data later, and if the difference exceeds the setup or hold window the link fails intermittently. Crosstalk adds a coupled fraction of one signal onto another, and ground bounce moves the reference the receiver compares against. All of these scale with edge rate, which is why a design that worked at a lower clock can fail when only the driver is changed.

Impedance Matching and Reflections

A trace has a characteristic impedance set by its width, its dielectric thickness and the material. Where that impedance changes, part of the travelling wave reflects, and the reflection travels back to the source, where it may reflect again. Every discontinuity therefore produces a series of echoes that arrive at the receiver at different times and distort the waveform.

The discontinuities that matter most are the ones that are easy to create accidentally: a change in trace width, a via that adds capacitance, a connector, a stub of unused trace, and a reference plane that changes layer without an accompanying ground via. Our notes on microstrip and stripline routing describe how the two common transmission line structures behave, and impedance discontinuity analysis shows how each appears in a measured profile.

Termination Strategies

Termination absorbs the energy that would otherwise reflect. A series resistor at the driver slows the edge and matches the source to the line, which is simple and costs little in power. A parallel resistor at the receiver matches the line to the load and is more effective but draws static current. A differential pair is often terminated with a single resistor across the pair, which suits low voltage differential signalling and keeps the component count down.

The choice follows from the topology. A point to point link with a single receiver is well served by series termination; a bus with multiple loads needs either parallel termination at the far end or a low voltage differential scheme. What matters is that the termination is placed at the physical end of the line, not merely connected somewhere near it, because a resistor placed before the end leaves a stub that reflects anyway.

Crosstalk Between Neighbours

Crosstalk is the coupling of energy from one trace to another through the electric and magnetic fields between them. It appears as a forward coupled pulse that travels with the aggressor and a backward coupled pulse that returns to the source, and its magnitude depends on how close the traces are, how long they run in parallel and how high the edge rate is.

Three measures control it. Increase the spacing between traces, which reduces coupling roughly with the square of the distance until the reference plane dominates. Keep the dielectric between the trace and its reference thin, which pulls the field down into the plane and away from the neighbour. And avoid long parallel runs, particularly between a fast clock and a sensitive input, since coupling accumulates with length. Guard traces help at the highest frequencies, but they must be stitched to the plane at short intervals to be effective.

Delay, Skew and Length Matching

Propagation delay depends on the dielectric constant and on the trace geometry, so two routes of identical length in the same layer run at the same speed while the same route on an outer layer runs slightly faster than on an inner layer. Where a bus must arrive together, the lengths are matched, and the matching is done within a layer rather than across layers unless the difference is accounted for.

Skew also comes from the drivers and from the package, not only from the board, which is why a length matching tolerance has to be derived from the timing budget rather than chosen arbitrarily. Matching every net to a fraction of a millimetre when the budget allows several millimetres wastes routing area and adds vias, and each via adds an impedance discontinuity of its own. Our notes on routing high frequency data buses cover the practical approach.

Power Integrity and Ground Bounce

Signal integrity depends on the reference staying still. When many outputs switch at once, the current they draw through the supply and ground inductance moves the local reference, and the receiver compares the incoming signal against a moving threshold. The result is jitter that appears even when the trace geometry is perfect.

The remedies are a low inductance plane pair, decoupling placed against the device pins, and enough reference pins on the package to carry the return current. On a wide bus it also helps to stagger the switching so that not every output transitions on the same edge, which reduces the peak current without changing the timing.

Design Rules That Prevent the Problems

Most of the risk can be removed before any simulation is run. Route controlled impedance traces over an unbroken reference plane, keep the reference layer adjacent to the signal layer, and change reference layers only with a ground via beside the signal via. Avoid stubs, keep via count low on critical nets, and reserve the outermost layers for slower signals where the field is less contained.

Then constrain the aggressive nets. Give clocks their own routing channel, keep them away from board edges and connectors, and enforce a minimum spacing to any input that is sensitive. Simulation and pre-layout analysis are worth doing on the highest speed interfaces, but the rules above catch the majority of problems on the rest of the board at no cost. Our notes on multilayer boards for high speed design explain how the stackup supports them.

ESD and Interface Protection

Protection devices are part of the signal path and have to be treated as such. A transient suppressor adds capacitance that can slow an edge or distort a differential pair, and the stub connecting it to the trace adds an impedance discontinuity. Placing the device close to the connector, with a very short return to a quiet reference, minimises both effects while still doing its job.

Series elements such as resistors or ferrite beads belong on the connector side of the protection device, so that the transient is clamped before it reaches the series impedance, and the return current path from the clamp must not run through the sensitive circuit area. Getting this order right is the difference between a design that survives an ESD test and one that passes it by luck.

FAQ

At what frequency does signal integrity start to matter? It is the edge rate rather than the clock frequency that decides. Once the rise time becomes comparable to the round trip propagation delay of the trace, the trace behaves as a transmission line and reflections must be managed.

Do I always need termination? No. Short point to point links whose round trip delay is much shorter than the edge rise time work without it. Longer routes, buses with several loads and any interface running at high speed normally need a termination of some kind.

How much crosstalk is acceptable? It depends on the noise margin of the interface. A useful working target is to keep coupled noise well below a few percent of the signal swing, which spacing and a thin dielectric between trace and plane usually achieve.