Thermal Via Array Design Under Power Devices

A power device soldered to a pad has to get its heat out through the board. The heat leaves the die, crosses the package, crosses the solder layer, enters the copper pad and then has to travel somewhere. If it can only spread sideways through the copper on the top layer, it accumulates; if it can pass through the board to a copper area on the other side, the surface area available to the air is multiplied. That passage is provided by a thermal via array.

This article explains how heat moves through the array, how the vias are arranged, how the copper on the far side is used, and how the arrangement is verified.

How Heat Leaves A Package

There are three paths: convection from the surface of the package, conduction into the leads or the balls, and conduction into the board through the thermal pad. On a surface mount power device the third path usually dominates, and it is the one the layout controls.

The path through the board is a series of resistances: the solder layer, the copper pad, the via barrel and its plating, the copper on the other side, and finally the surface that rejects the heat into the air or into a heatsink. The largest single term is often the surface that rejects the heat, which is why the copper area on the far side matters as much as the number of vias.

Via Geometry And Plating

A via transfers heat in proportion to the cross sectional area of its copper and inversely to its length, so a larger diameter and a thicker plating both reduce the thermal resistance. A 0.3 millimetre via with 25 microns of plating in a 1.6 millimetre board has a thermal resistance of roughly 60 to 80 kelvin per watt on its own, and a typical array of 16 to 25 such vias in parallel brings the total down to a few kelvin per watt.

The plating thickness matters as much as the diameter, since the copper is only on the wall. Filling the via with a conductive material or using a copper filled via reduces the resistance further but at a much higher cost. Where the array also has to carry current, the same copper provides a low resistance path, and the current capacity is calculated with the same tools as any other copper, as described under trace width and current calculation.

Copper Area On The Far Side

The heat that arrives on the other side has to spread before it can be rejected, and heat spreading depends on area rather than on thickness once the copper is thicker than a few tens of microns. A small copper area under the array heats up and the array becomes ineffective, while a large area distributes the heat over a surface that can transfer it to the air. The area is often made as large as the layout allows, and it is usually connected to a plane so that the whole layer participates.

The plane may be solid or a mesh, and the choice depends on the thermal and the mechanical requirements. A solid plane spreads heat best and is also the stiffest option, while a mesh plane is used where the copper has to balance the stackup or where the resin flow during lamination requires it. The trade between the two is described under copper flooding, mesh or solid.

Solder Void And The Interface

A void under a thermal pad is a region with no metal, and the heat has to go around it. A void of 20 percent of the pad area does not remove 20 percent of the thermal performance, because the copper spreads around it, but it does raise the temperature of the die locally and it creates a hot spot that can be the start of a failure. The accepted limit for voiding under a thermal pad is therefore tighter than for a signal ball.

The vias themselves interact with the voiding. An open via under the pad provides a path for flux vapour to escape, which reduces voiding, and it also lets the solder wick into the barrel. A via that is tented on the far side traps the vapour, and one that is open allows solder to flow through and form a bump on the other side, which may interfere with the assembly of that side. The choice is part of the design and is described under microstrip and stripline routing in the context of the surrounding structure, and the power stage it belongs to under DC-DC converter layout and routing.

Simulation And Measurement

The thermal path is modelled with a finite element or a thermal network analysis, and the model gives the junction temperature for a given power and ambient. The model is only as good as its inputs, and the two that are most often wrong are the thermal resistance of the interface, which depends on the voiding, and the thermal resistance of the surface that rejects the heat, which depends on the airflow and the surrounding components.

Measurement is the other half. A thermal camera or an infrared microscope on a board running at full load shows the temperature distribution, and a thermocouple attached to the copper beside the device gives a figure that can be compared with the model. The measurement on the working board in the real enclosure is the only definitive evidence, and it should be made before the product is released rather than after a field failure.

Design Rules

The practical rules are to use as many vias as the pad will hold with a sensible spacing, to use a diameter that the plating can cover reliably, to connect the far side to a large copper area or plane, and to keep the vias inside the pad so that the solder does not wick away from the joint. A spacing of about 1 millimetre between centres is common, with the vias arranged in the pad and not on its edge.

Where the heat is large, the array is combined with a copper area on both sides and with a thermal interface to a heatsink or to the enclosure. At that point the board is one element of a thermal design that includes the housing, and the design of the whole system rather than the array alone determines the result. The assembly sequence that produces the joint is described under PCBA development process.

Thick Copper And Metal Core Alternatives

Where the thermal load is large, the array of vias is sometimes replaced by a different structure altogether. A heavy copper layer spreads heat laterally far better than an ordinary one and reduces the temperature gradient across the pad. A metal core board, with an aluminium or copper base laminated to a thin dielectric, conducts heat away from the device without passing through the thickness of the board and is used on LED and power assemblies where the board itself is the heatsink.

Each of these changes the fabrication route and the design rules. A metal core board cannot be drilled and plated in the same way, so the interconnect is different, and a heavy copper layer has larger minimum features and a thicker etch compensation. The choice is made at the start of the design rather than after the layout, which is why the thermal requirement has to be established before the first placement is fixed.

FAQ

How many thermal vias are enough? The number is set by the thermal resistance that the design can tolerate, and beyond about 20 to 25 vias in a typical pad the returns diminish because the copper area and the surface dominate.

Should thermal vias be tented? Tenting on the far side traps flux vapour under the pad and increases voiding, while leaving them open allows solder to wick through. The usual compromise is to leave them open and accept the small bumps, or to plug them with a filled via process.

Do thermal vias carry current as well as heat? They do, and the same copper that conducts the heat conducts the current. The current capability is calculated from the total copper cross section that the array provides.