Embedded Component PCB: Placing Parts Inside the Board
An embedded component PCB carries some of its parts inside the board rather than on the surface. The components, usually resistors and capacitors and occasionally an active die, are placed on an inner layer during lamination and buried under the layers above. The board that comes out is thinner, has a shorter and cleaner electrical path to those parts, and frees surface area that would otherwise be occupied by decoupling and termination.
This article explains what can be embedded, why the technique is used, and which design rules have to be respected for the board to be manufacturable.
What Can Be Embedded
Passive components are the common case. Thick-film resistors can be printed directly onto a copper layer, and planar capacitors can be formed from a thin high-permittivity dielectric laminated between two copper foils. Discrete chip components can also be buried in a cavity or bonded to an inner layer and covered by subsequent laminations.
Active devices are possible but rare. A bare die can be embedded in a cavity, connected by wire bonds or by a flip-chip process, and covered by build-up layers. The technique produces very short interconnects between the die and its neighbours, at the cost of a complex process and a board that cannot be repaired.

Why Embed Components
The first reason is space. Moving a row of decoupling capacitors inside the board removes them from the surface, which can reduce the board area or make room for a component that cannot be embedded. In products where the outline is fixed by the enclosure, that freed area is often the difference between closing the design and adding a layer.
The second reason is electrical. A capacitor buried directly beneath the power and ground planes has essentially no lead inductance, and the loop area between it and the device it serves is tiny. That is exactly what a high-frequency decoupling network needs, and it is difficult to achieve with a surface-mounted part no matter how the traces are routed. The signal integrity benefit appears as reduced supply noise at the device pins, which is often the difference between a marginal eye diagram and a comfortable one, particularly on a board where the surface area left for decoupling is limited. The third reason is mechanical: fewer surface joints means fewer places for a solder joint to crack.
<img src="https://www.gopcba.com/wp-content/uploads/2026/08/17aa72336fa5.webp" alt="Inner layer with embedded passive components” />
Embedded Passives in Practice
Printed resistors are formed from a resistive foil or paste that is laminated onto the copper and then etched to the required pattern. Their tolerance is worse than a discrete chip resistor, commonly a few percent before trimming and better after laser trimming, and their temperature coefficient is larger. They are best used for termination and for pull-up duties where a wide tolerance is acceptable.
Embedded capacitance is usually created with a thin dielectric layer between two plane layers, forming a distributed capacitor across the whole board area. This is the same mechanism that gives a closely spaced power and ground plane pair its high-frequency performance, taken further with a higher permittivity material. It cannot replace bulk capacitance, but it can supply the high-frequency energy that a fast device needs in the first nanoseconds.
Embedded Active Devices and Die
Embedding a die follows one of two routes. In the face-up process the die is bonded to a copper pad and connected with wire bonds, then encapsulated and covered by build-up layers. In the face-down process the die is flip-chip mounted onto the inner layer and underfilled, with the same encapsulation and lamination steps following.
Both routes require the die to be known good before embedding, because the finished assembly cannot be reworked. That requirement is the main obstacle to the technique outside high-volume products, where the cost of testing and discarding a few assemblies is outweighed by the performance and size benefit.
Materials and Process Flow
The process adds steps to a conventional multilayer build. The embedded components are formed or placed on the inner layer, the layer is laminated into the stack, and the outer layers are then built on top. Where the embedded device requires connection to a via, the laser drilling and via filling steps resemble those of an HDI board, and the via filling process constraints apply directly.
Registration between the embedded feature and the layers above it is the critical process capability. A resistor that has to be contacted from an outer layer must be positioned accurately enough for the via to land inside its pad, and that tolerance is tighter than a conventional board requires. The selection of blind and buried via structures is therefore part of the embedded design, not an afterthought.
Design Rules and Constraints
Several rules are particular to embedded designs. The embedded feature must be inside the board outline with a margin, and it must be clear of any area that will be routed or drilled away. Where a chip component is buried, its height adds to the local board thickness, so the stack has to be built with cavities or with extra dielectric to accommodate it.
Thermal expansion is another constraint. An embedded component surrounded by laminate sees the full expansion of the surrounding material during reflow, and the mismatch between the component and the laminate produces stress. That is manageable for a small passive and much harder for a large die, which is why embedded actives are usually small.
Finally, the design has to plan for the fact that these components cannot be probed or replaced. Where a via in pad is used to contact an embedded part, the via in pad guidelines explain the filling and plating conditions that keep the contact reliable.
Test, Rework and Cost
Testing an embedded component PCB has to happen at the layer stage, before the board is sealed, because afterwards the parts are inaccessible. That means the inner-layer test programme carries the full responsibility for detecting a defective or misplaced component, and the panel cannot be repaired if it fails.
Cost is therefore dominated by yield and by the extra process steps rather than by material. A design that embeds a handful of resistors in a board that already needs a fine-line build-up is often economically sensible, because the incremental cost is small. A design that embeds components purely to save a few square millimetres on a conventional board is unlikely to pay back.
FAQ
Can embedded resistors be adjusted after lamination? Not individually, because they are sealed inside the board. Trimming has to be done at the inner-layer stage, before the layers above are laminated, which means the measurement and the trim operation become part of the inner-layer process.
Is an embedded component PCB repairable? Generally not. There is no practical way to reach a buried component without destroying the layers above it, so a board with a defective embedded part is scrapped. This is the main reason the technique is restricted to designs where the benefit justifies the loss.
Does embedding change the board thickness? It can. Buried chip components need clearance in the stack, so the board is usually thicker than a conventional design at the same layer count. Planar resistors and capacitive layers add almost nothing, which is one reason they are the most widely adopted embedded features.



