Via Stub: Via Design Rules and Their Hidden Cost

Vias are the least examined feature on most boards and the one that carries the most hidden cost. Each one is a hole, a plating operation and a discontinuity, and the design rules around them determine both the density that can be achieved and the reliability that results.

What a Via Costs

A via consumes board area on every layer it passes through, because the clearance to the surrounding copper has to be maintained on all of them. That area is the real cost, not the drill or the plating.

The clearance is required for the drilling tolerance and for the electrical spacing, and it is larger than the via pad itself. A via that appears small on the screen removes a disc of copper several times its diameter from each plane it crosses. Our hole types notes describe the relationships.

Via Size and Its Electrical Effect

A via has capacitance to the planes it passes and inductance in series with it, and both matter at high frequency. The capacitance is proportional to the pad and antipad areas, and the inductance depends mainly on the length of the barrel.

The effect of a via on a matched line is a small impedance discontinuity, which becomes significant as the data rate rises. Where the effect matters, the response is a smaller via, a shorter barrel or a ground via placed nearby to reduce the loop. Our high speed design notes describe the analysis.

Via cross section showing barrel and antipad

Via Stubs and Their Resonance

Where a via carries a signal from one layer to another and continues to the far side of the board, the unused portion is a stub. The stub reflects energy at a frequency determined by its length, and at that frequency the insertion loss shows a notch.

The remedies are a blind via that stops at the target layer, a thinner board, or a backdrill that removes the stub after plating. Each has a cost, and the choice follows from the highest frequency the channel carries.

Via in Pad and Filling

A via placed inside a pad has to be filled and plated over, because an open via beside a solder joint wicks solder away from the joint and produces a void. The fill process is an additional step and should be specified.

The alternative is a via outside the pad connected with a short trace, which is easier to build but consumes routing area. The trade is usually decided by the pitch of the device. Our HDI via process notes describe the fill.

<img src="https://www.gopcba.com/wp-content/uploads/2026/05/Smart-Meter-PCBA.png" alt="Via fence along a radio section boundary on a PCB” />

Thermal Vias

A thermal via array carries heat rather than signal, and its design rules are different. Many small vias outperform a few large ones because the plating thickness is limited, and the array should be connected to a plane that can spread the heat.

The vias in a thermal array should not be tented in a way that traps flux, and where the array sits under a component the paste volume has to account for the vias drawing solder away.

Via Fencing and Shielding

A row of vias along the edge of a radio section forms a fence that contains the field, provided the spacing between them is a small fraction of the wavelength of interest. The rule is a fraction of a wavelength rather than a fixed dimension.

The fence has to be connected to the same plane on both sides, and its effectiveness depends on the plane continuity rather than on the number of vias. A fence along the edge of a split plane achieves very little.

Design Rules and Their Interaction

The via rules interact: a smaller via requires a smaller pad, which reduces the annular ring and therefore the registration margin; a smaller antipad reduces the clearance but increases the capacitance to the plane. Changing one moves the others.

The practical approach is to define a small number of via types, each with a purpose, and to use them consistently rather than optimising each via individually. Consistency also makes the design rule check meaningful.

Counting and Documenting Vias

The via count matters for cost and for reliability, and it should be reported rather than left implicit in the data. A design with an unusual number of vias, or with vias on a pitch that is close to a process limit, should be discussed before the panel is released.

The documentation should also state which vias are to be filled, which are to be tented and which are thermal. Those are process instructions rather than layout preferences. Our fabrication notes guidance lists the entries.

Process Control and Verification

On a design of this kind, antipad is the item that decides how the rest of the board is arranged. Keeping a sample from the panel turns a dispute into a measurement, because the same coupon can be re-examined by both parties without rebuilding the batch. Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end.

Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule. The process window is set by the narrowest step in the flow, so an improvement anywhere else shows up as margin rather than as yield until that step is addressed.

A short note on the drawing about handling, storage or packaging is often worth more than an extra decimal place on a tolerance.

Process Control and Verification

On a design of this kind, antipad is the item that decides how the rest of the board is arranged. Keeping a sample from the panel turns a dispute into a measurement, because the same coupon can be re-examined by both parties without rebuilding the batch. Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end.

Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule.

Process Control and Verification

On a design of this kind, antipad is the item that decides how the rest of the board is arranged. Keeping a sample from the panel turns a dispute into a measurement, because the same coupon can be re-examined by both parties without rebuilding the batch. Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end.

FAQ

How small can a via be? The limit is set by the drill and by the registration, not by the drill alone. A via whose pad leaves no annular ring after the worst-case registration error is a via that will intermittently fail, and the yield loss appears before the reliability loss.

Do I need to backdrill every high speed via? Only where the stub is long enough to create a notch inside the band of interest. Below that frequency the stub adds a small amount of loss and no resonance, and backdrilling is an unnecessary cost.

What does gopcb confirm about vias? We confirm the via and pad diameters against our process, the aspect ratio, the fill requirement, the tenting and the count against the quotation. Where a design uses a via type we cannot produce reliably at the quoted price, we say so before the panel is released.

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