HDI PCB: Blind and Buried Vias, and When They Are Worth It An HDI PCB is usually requested for a reason that has nothing to do with fashion: a package is too dense, a product is too thin, or a bus is too fast for the routing area available. The…
SMT Factory Capability: What to Inspect Instead of What to Believe Most assessments of an SMT supplier start with a list of machines and stop there. Equipment is the easy part to describe and the least informative part to compare, because two factories can run the same placement platform and…
PCB Layout Quality: The Review Checklist Before You Release Judging PCB layout quality is not a matter of taste. The same five areas decide the answer every time, and each of them can be inspected in a specific way rather than argued about. This is the checklist worth running before…
BGA Signal Integrity: Fanout, Length Matching and Decoupling A large BGA package compresses hundreds of connections into a few square centimetres, and it removes the ability to fix a routing problem along a trace. Everything that determines whether the high speed nets work is decided in the first few millimetres…
Flyback Diode and Relay Coil Turn-Off: Where the Current Goes The transistor that drives a relay coil fails at the moment the coil is switched off, not while it is running. With the coil energised the current is steady and the device is fully enhanced, so it is dissipating almost…
Soft Start Circuit Design: Ramp, Inrush and the MOS Between Them A soft start circuit is usually described as a capacitor that slows the gate, and usually implemented by copying a resistor and capacitor value from another design. On the bench the output ramp looks smooth, the board passes, and…
DC Voltage Drop: Why the Regulator Is Fine and the Chip Is Not The regulator output measures perfectly and the chip is still undervoltage. This is one of the most common supply faults on a new board, and it is almost never the regulator. The voltage the die actually receives…
Via Density and the Reference Plane: When a Legal Array Becomes a Wall A via that satisfies every spacing rule can still damage a high speed channel. The rule checks one antipad clearance against its neighbour. The signal cares about what the whole array does to the copper around it,…
Ping Pong Buffer Design: The Handover Rules That Stop Tearing A ping pong buffer looks trivial on a block diagram: two memory banks, one being written while the other is read, and a swap at the end of every frame. In practice almost every failure in such a design happens…
Circuit Design Risks: The Ones Engineers Keep Hitting Most circuit designs do not fail because a formula was wrong. They fail because a margin was assumed rather than calculated, because two devices were expected to agree on a level that neither specified clearly, or because a part that was available…
