Common PCB Design Problems That Delay Fabrication and Assembly
Most boards that come back from fabrication with a query, or from assembly with an unexpected defect, are not failing because of an exotic mistake. They are failing because of a small set of familiar issues that are easy to introduce in a CAD tool and easy to miss on a screen. Collecting these common PCB design problems into a checklist makes them cheap to remove, and working through that checklist before release is one of the highest-value habits in layout work.
Why These Problems Repeat
Each of the problems below has the same characteristic: the tool accepts the input, the electrical connectivity stays correct, and the error only becomes visible when the data reaches a machine that has to act on it. A drill that has to be positioned twice in the same place, an aperture that has to be plotted where none was intended, a mask opening that covers a pad that needs soldering: none of these show up in a netlist check. They show up in the fabricator’s engineering review or on the assembly line, and the delay they cause is measured in days rather than minutes.
Pad Overlap and Overlapping Holes
Overlapping pads, other than surface pads that are intentionally merged, imply overlapping holes. A drill that is programmed to the same position twice will break or damage the hole, and the effect on the finished board is a scrap panel rather than a rework. The problem becomes more subtle on a multilayer board when one of the overlapping positions is a clearance pad and the other is a connected pad: after the artwork is stretched during imaging, the result appears as an isolated pad, and the board is rejected. Checking the hole table for duplicate coordinates, and confirming that no two hole positions are closer together than the fabricator allows, catches both cases before the data is released.
Single-Pad Aperture Settings
A single-sided pad that is not drilled should have an aperture value of zero rather than a plausible-looking number. If a diameter is entered, the drill data generation places a hole at that coordinate, and a hole appears where none is wanted. Where a single-sided pad does need a hole, it should be marked explicitly so that the intent is not lost when the data is regenerated. This is a small bookkeeping issue with an outsized effect, because a single stray hole in a connector footprint can make a panel unusable.
<img src="https://www.gopcba.com/wp-content/uploads/2020/12/ptt_contacts.jpg" alt="layout view showing pad overlap and silkscreen conflicts on a PCB” />
Misuse of Drawing and Mechanical Layers
Drawing layers are for construction lines, dimensions and notes, not for conductors and not for component outlines. When real connections are drawn on a mechanical layer, or when the layer usage is not consistent between designers, the data preparation stage has to guess which layer is which. A wrong guess either cuts a connection that should have been kept or shorts two nets that should have been separated. The same problem appears when a design is drawn with the component surface on the bottom and the solder surface on the top, which is unconventional and forces everyone downstream to translate. Keeping the layer naming consistent and the intent obvious costs nothing and prevents a class of errors that is difficult to diagnose.
Silkscreen Placement and Text Size
Silkscreen that covers a pad interferes with the electrical test and with soldering, because the ink is not a solderable surface and the stencil cannot print through it. Text that is too small will not print legibly, and text that is too large overlaps neighbouring characters, which makes the reference designators useless exactly where they are needed. A practical rule is to keep the silkscreen clear of every pad by a small margin, choose a text height that the fabricator can print on the chosen surface finish, and check the assembly drawing for text that runs under a component body where it will never be read. The ink behaviour on fine features is the same problem described in this article on solder mask ink thixotropy.
<img src="https://www.gopcba.com/wp-content/uploads/2026/09/21-2.jpg" alt="copper mesh pattern and thermal relief connections on a plane” />
Filled Blocks and Solder Mask Data
A pad drawn as a filled block may pass a connectivity check and still be unsuitable for production, because the mask data cannot be generated correctly for it. When the mask is applied, the filled area is covered, and the component that was supposed to be soldered there cannot be soldered. Filled blocks also produce very large plotted data sets, which slows down the data preparation step and increases the chance of a conversion error. Replacing a filled block with a proper pad shape, or with a small number of pads, resolves both issues at once.
Surface-Mount Pads Too Short for Test Probes
Test access is a design requirement, not an afterthought. On a dense surface-mount assembly, the pitch between the two rows of a component may be small and the pads narrow, so a probe cannot land on the pad directly. The layout then needs staggered test points above and below the component, or a dedicated test net, and a pad that is too short will prevent the probe from making contact even when the position is technically available. Where copper pours cover the surface, the pour must also leave room for the probe. This is one of the few design issues that has no electrical symptom at all, which is why it is usually found only when the test fixture is built.
Copper Mesh Spacing and Balanced Etching
A copper mesh whose lines are separated by less than about 0.3 mm is difficult to etch evenly, and after imaging, slivers of film or partially etched copper can remain attached to the panel and cause open circuits. The same mechanism applies to a board with very thin traces in an area where the surrounding copper has been cleared: the etchant removes the thin trace faster than the surrounding metal, so a trace that is acceptable in isolation may be attacked or broken. Providing copper in the empty areas balances the etch, and it also improves the return path. The choice between a solid plane and a mesh is discussed in this article on copper flooding, mesh or solid.
Thermal Relief and Plane Connections
On a power or ground plane, the way a pad connects to the surrounding copper affects both the electrical performance and the soldering process. A pad connected to a plane by a full ring of copper conducts heat away so quickly that the joint may not reach soldering temperature on the assembly line, while a thermal relief provides a defined connection that is easier to solder. The relief geometry, and in particular the number and width of the spokes, is a design decision that should be made deliberately rather than by default. Where a plane is used for a sensitive analog circuit, the connection style also affects the impedance of the return path, which is why the pad and plane rules belong together, as described in this article on PCB pad design standards.
FAQ
What is the most common cause of a fabrication query? Ambiguous or missing data: a layer whose purpose is unclear, a hole table with duplicate positions, or a mask opening that was never defined.
Why does silkscreen over a pad matter if the ink is thin? Because solder cannot wet through ink, and the test probe cannot make contact with it, so the pad becomes unusable for soldering or for test.
Should every pad on a plane use a thermal relief? Not every pad. Pads that must conduct heat, such as a power device tab, are connected solidly, while pads that are soldered on the assembly line usually benefit from a relief.
