Electrical Overstress and Latch-up Investigation

A device that fails with no sign of mechanical damage has usually been taken beyond its ratings, and the question is which rating and for how long. The damage is often invisible, which is why the investigation begins with the circuit rather than with the package.

What Electrical Overstress Is

Overstress is any condition outside the absolute maximum ratings, including a voltage above the rating, a current above the rating, or a rate of change that the device cannot follow.

The failure can be immediate, as with a gate oxide rupture, or cumulative, as with a junction that degrades over many events. The cumulative form is the harder to find because the device passes every test until it does not. Our reliability notes describe how the margin is assessed.

Common Sources in an Assembly

Inductive loads and long cables store energy that returns to the device when the switch opens. The transient can exceed the rating even though the steady state current is well inside it.

A hot plug event charges a capacitor through a low impedance and the inrush can exceed the current rating. A ground that is lifted during a test or a repair is another path that puts the supply across the wrong pins. Our design release notes describe where the protection is recorded.

Latch-up

Latch-up is a parasitic path that turns on and stays on, drawing a current that the device is not designed to carry. It can be triggered by an overvoltage on an input, by a supply that rises out of order, or by a transient.

Once latched, the device draws current until the supply is removed or the device destroys itself. The current path is internal, so the external circuit may show only a rise in supply current.

Evidence and Limits

The evidence is the supply current, the signal levels at the pins and the state of the device before and after the event. All of it should be captured at the moment of failure, not reconstructed afterwards.

The oscilloscope must be set to capture the event, with the bandwidth and the probe arranged for the rates involved. A measurement made with a standard probe at low bandwidth will miss the event that caused the failure. Our probe notes describe how an internal net is measured.

Protection Measures

The measures are a series element, a clamp, a snubber or a change to the sequence. A series resistor or inductor limits the current, a clamp defines the maximum voltage, and a snubber absorbs the energy from an inductive load.

Each measure has a cost in signal integrity, in space or in efficiency, so the choice follows the transient that has to be handled. Our ferrite notes describe a component that is often used in this role.

Reproducing the Event

The event should be reproduced on a sacrificial assembly before the protection is finalised. The conditions to reproduce are the temperature extremes, the supply tolerance and the load, because the rating is a limit at a condition.

The reproduction should be repeated to show whether the failure is deterministic or statistical, since the two lead to different conclusions.

Corrective Action

The action is the protection change plus a verification that the same event no longer damages the device. The verification is the reproduced test with the protection in place, performed at the worst case condition.

Where the protection cannot be added, the rating of the device is the other option, and the two should be compared on cost rather than on preference. Our derating notes describe how the margin is set.

Process Control and Verification

On a design of this kind, transient is the item that decides how the rest of the board is arranged. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance. A stack-up that is drawn rather than described removes most of the ambiguity from a quotation, and it lets the fabricator price the board against the dielectric and copper weights that will actually be used.

Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design. The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel.

Running a first article through the same checks as the production panel confirms that the two agree, and that comparison is the cheapest form of process control available at prototype stage. Keeping a sample from the panel turns a dispute into a measurement, because the same coupon can be re-examined by both parties without rebuilding the batch.

Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end.

Process Control and Verification

On a design of this kind, transient is the item that decides how the rest of the board is arranged. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance. A stack-up that is drawn rather than described removes most of the ambiguity from a quotation, and it lets the fabricator price the board against the dielectric and copper weights that will actually be used.

Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design. The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel.

Process Control and Verification

On a design of this kind, transient is the item that decides how the rest of the board is arranged. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance. A stack-up that is drawn rather than described removes most of the ambiguity from a quotation, and it lets the fabricator price the board against the dielectric and copper weights that will actually be used.

A first article check confirms that the process and the drawing agree on the points listed above, and that the coupon data supports the values used in the design.

Where a measurement falls outside the expected window, the sample is retained so that the cause can be established before the balance of the batch is released.

FAQ

Can overstress be detected by a functional test? Not reliably. A device that has been degraded may pass every test until the margin that remains is used up.

Is a clamp enough on its own? It defines the voltage, and the energy still has to go somewhere. The clamp, the series element and the layout path should be designed together.

What does gopcb provide for overstress investigation? We provide supply and signal capture at the moment of failure, transient assessment of inductive and hot plug events, latch-up review with the supply and pin conditions, protection selection with its cost, reproduced testing on a sacrificial assembly at the worst case condition, and verification that the corrective action holds.