Inverter PCB Design: Creepage, Isolation and Thermal Paths

An inverter board is where power electronics layout stops being forgiving. The board has to carry tens or hundreds of amperes, switch them in a few tens of nanoseconds, isolate the control side from the mains side, and dissipate the losses that all of that produces. Each requirement pulls the layout in a different direction, and the design is essentially the process of finding the arrangement where they can coexist.

This article works through the constraints in the order they usually become binding: isolation, gate loop, current sensing, thermal path and emissions.

The Blocks of an Inverter Board

Most inverter boards have the same structure. A DC link carries the input with a bulk capacitor bank and a high-frequency decoupling network. A half bridge or a three-phase bridge switches the DC link onto the motor or the load. A gate drive section converts the logic-level signals into the voltage and current the switches need. A current sense element measures the load current, and a controller runs the modulation.

Each block has a return current that must be planned, and the blocks are connected by the return paths as much as by the signal traces. Most inverter layout problems are return path problems: a gate drive return that shares a path with the power stage return, or a current sense return that carries part of the switching current.

Isolation and Creepage

The control side and the power side are separated by an isolation barrier. The distance across that barrier is set by the applicable safety standard, and it has two components: clearance, which is the shortest distance through air, and creepage, which is the shortest distance along the surface of the board. Creepage distance is usually the larger of the two at mains voltages.

Both distances increase with pollution degree and with altitude, and both are affected by the surface condition of the laminate. A slot milled through the board between the two sides increases the creepage path without increasing the board area, which is why slots and cutouts appear so often in this class of design. Where isolation is required, the barrier must be treated as a fixed region that routing cannot cross, and its dimensions should be confirmed against the standard before the layout begins.

Gate Drive Loop Inductance

The gate drive loop is the highest-performance part of the layout. When a switch turns on, the gate current flows out of the driver, through the gate resistor and the gate, and back to the driver. The inductance of that loop, together with the gate resistance, sets the switching speed, and it also determines how much the gate voltage rings and whether the switch can be turned off fast enough to limit a fault current.

The goal is to make the loop as small as possible. Place the driver next to the switch, route the gate and source return alongside each other, and keep the return on the same layer where possible so the loop area is minimal. The gate drive loop should not share any part of its return with the power stage, because the high di/dt of the power current will couple into the gate and can cause spurious turn-on.

Current Sensing and Shunts

Current sensing is usually done with a shunt resistor in the source of the low-side switch or in the DC link return. The voltages involved are small, often tens of millivolts, so the sense circuit is sensitive to any voltage drop in the ground path that shares current with the power stage. That is why separate sense returns routed back to the controller are required.

Kelvin connection to the shunt is the standard technique. The sense traces connect to the shunt pads at points inside the current path, so that the resistance of the solder joint and the pad does not appear in the measurement. The shunt itself should be placed so that its thermal expansion is not constrained by the surrounding copper, since a shunt that is clamped by a heavy plane will drift as it heats.

Thermal Paths and Copper

The switches are the heat source, and the copper is the path to the outside. On a surface-mount design the drain or collector tab solders directly to a copper area that acts as a heatsink, and that area is connected to the other side of the board with thermal vias. The trace width and current calculation gives the copper area needed for the current, and the thermal calculation determines how much of it must also serve as a heatsink.

Thermal vias need to be placed in an array under the tab, with a pitch that the solder can flow around without leaving voids. Filling the vias with copper, or using a thermally conductive fill, improves the vertical conduction and prevents solder from wicking through during assembly. The DC-DC layout and routing rules apply to the switching cell itself, which is a closely related problem at lower current.

EMI and Switching Noise

The switching node is the noisiest point on the board and also the one with the most copper attached to it. Both properties are unavoidable, so the layout should minimise the area of the switching node and keep it away from the isolated side and from the sense circuits. The high-frequency decoupling network must be placed so that the loop between the switch and its nearest capacitor is as small as the current path allows.

Common-mode current is the other emission mechanism, and it is driven by the voltage transient on the switching node working against the parasitic capacitance to ground. Keeping that capacitance small, and providing a controlled return path for the common-mode current, is more effective than adding filters afterward. The emissions layout measures for switching regulators describe the same mechanisms at a smaller scale.

The Order to Lay Out an Inverter Board

Start with the isolation barrier and the thermal path, because both fix large regions that cannot be negotiated later. Then place the switching cell and its high-frequency capacitors, and minimise that loop. Then place the gate drivers and route the gate loops. Then place the current sensing and route its returns. Finally, route the controller and the low-level signals into whatever space remains.

That order matters because each step consumes freedom that the later steps need. A design that routes the controller first will usually find that the switching cell cannot be placed where it needs to be, and the resulting compromise appears as ringing, noise or a hot switch.

FAQ

How much clearance does an inverter board need? The figure comes from the applicable safety standard and depends on the working voltage, the pollution degree and the altitude. It is a specification to be looked up, not a rule of thumb, and it should be established before the layout starts.

Can a metal core board be used for an inverter? It can, and the thermal benefit is substantial. The limitation is that the circuit is effectively single-sided, which makes the gate drive and sense routing harder, and the isolation distance has to be maintained through the dielectric as well as across the surface.

Why does the gate loop matter so much? Because its inductance sets the switching speed and the ringing, and it works against the drive voltage available. A loop with a few nanohenries more inductance than necessary can turn a well-behaved design into one that needs a slower gate resistor, which raises switching loss and heats the switch.