Power Supply PCB Layout: Loop Area, Ground and Safety

A switching power supply is not one circuit. It is at least three circuits sharing a board: the high-current power stage, the gate drive that controls it, and the small-signal sensing that decides what the power stage should do. Treating them as a single layout problem is the most common reason a supply that worked on the bench becomes unstable or noisy in production. A workable power supply PCB layout starts by separating those three worlds and then deciding, deliberately, where they are allowed to touch.

Split the Circuit by di/dt and dv/dt

The first sorting step is not by voltage or by current but by which quantity changes fastest. A di/dt loop is one where the current through a conductor changes quickly: the input capacitor to the switch, the switch to the inductor, the inductor back to the capacitor. What matters there is the enclosed area of the loop, because the area sets the radiated field and the parasitic inductance that rings the switch node. Lay the outgoing and returning currents on different layers directly on top of each other, and the field of the forward path cancels the field of the return path. The loop area shrinks to the thickness of the dielectric, and much of the interference cancels itself before it leaves the board.

A dv/dt node behaves differently. Here the voltage swings fast, so the node is a capacitively coupled aggressor rather than a magnetic one. The rule flips: keep the copper area small rather than large, use the narrowest width that still carries the current, avoid stacking another copper region directly over it, and keep sensitive traces as far away as the geometry allows. A switching node that is generous with copper is a good radiator and a poor neighbor. Teams that already apply the guidance in DC-DC converter layout and routing will recognize the pattern: identify the loop, then decide whether area helps or hurts.

Power supply PCB layout showing the high current loop and gate drive

Loop Area Is the First Constraint

Of all the numbers in a power layout, the enclosed area of the high-frequency current loop is the one worth plotting first. Draw the path the current takes from the input capacitor, through the upper switch, into the inductor, and back through the lower switch or the diode. If that path wanders across the board and changes layers through a single thin via, the loop inductance adds tens of nanohenries to a circuit that was designed for a few. The result is an overshoot on the switch node, extra loss, and radiated emissions that show up in a scan long before they show up in a datasheet.

The practical implementation is unglamorous. Place the input capacitor within a few millimeters of the switch pins, on the same side of the board. Use multiple vias in parallel when the return path changes layers, so the via inductance drops in proportion to the count. Keep the return plane continuous under the whole power stage, with no slot or split that forces the current to detour. Each of these steps removes a fraction of the parasitic inductance, and together they decide whether the design behaves like the model or like an antenna.

Gate Drive and the MOSFET Problem

Gate drive is where a small mistake becomes a destroyed device. The gate loop is a low-impedance, moderately fast circuit, and it belongs as close to the transistor as physically possible. Route the gate trace and its return together, not as a signal and a distant ground, so the loop area stays small and the induced noise from the drain side stays out. A gate trace that runs parallel to the drain trace for any distance couples the drain swing straight into the gate, which shows up as a spurious turn-on and a brief shoot-through current that heats the device without any fault indication.

Keep the gate resistor close to the gate pin, and keep the return of the driver on the same reference as the source of the transistor. When the driver and the power stage sit on different ground regions, the gate signal is referenced to a point that moves with the switching current, and the effective gate voltage shifts with load. That is a mechanism for instability that no amount of compensation tuning will fix.

Sensing Signals Need Their Own Return

Voltage sensing and current sensing are the feedback path of the control loop, and they are the most fragile part of the layout. A sense trace that shares a return with the power stage carries the switching current as a common-mode error, so the controller sees a voltage that depends on load rather than on the output. Route each sense pair as a differential pair from the sense point to the controller pin, with the two traces matched in length and running side by side, and give them a solid reference plane directly underneath. Keep them away from the switch node and from the gate drive, and never run them under the inductor. If the sense signal must cross the power stage, cross it at right angles and on a different layer.

The sense point itself matters as much as the routing. For output voltage, tap the node at the output capacitor terminals rather than at the inductor, so the measurement includes the effect of the filter. For current, take the signal across the shunt with a Kelvin connection: two traces leaving the pad at the same physical point the current enters and leaves, so the measured voltage does not include the resistance of the solder joint.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/Prototype-PCB.jpg" alt="Creepage distance and clearance around the isolation barrier of a power board” />

Where the Grounds Meet

Grounding a power board is never as simple as pouring one plane, and several grounds must eventually become one. The high-current return of the power stage, the quiet return of the controller and its bypass capacitors, and the returns of the sensing network all need to reach the same reference, but they should not do it through the same copper. The usual approach is to define a single connection point and bring the noisy return to it on a wide, short path, then let the quiet circuits reference the same point from the other side.

The choice of that point is design specific. In a low-power inverter it is often a single ground pin of the DC bus capacitor. In an offline supply it is frequently the negative terminal of the bulk capacitor, because that node already handles the full ripple current. What matters is that the decision is made once, drawn intentionally, and documented, so that a later revision does not quietly add a second connection that turns the layout into a loop. The techniques described in ground routing and power trace planning apply directly here.

Creepage, Clearance and Component Placement

Safety spacing is a design input, not a final check. Required creepage and clearance depend on the working voltage, the pollution degree of the environment, and the altitude at which the product operates. Altitude reduces the breakdown voltage of air, so a supply rated for a lowland application may need wider spacing if the same unit is sold for use above 2,000 meters. Establish these creepage distance values before placement, because they constrain where the fuse, the bridge rectifier, and the isolation barrier can sit.

Component geometry interacts with those distances in ways that are easy to miss. A fuse has metal end caps with an insulating body between them; if it is mounted without a holder and sits flat against the board, the end caps can touch surface copper. Keep surface traces clear of the area under the metal ends, or specify a holder. The same logic applies to the pins of a connector, the tab of a rectifier, and the creepage slot cut under an optocoupler.

Thermal Path and Cooling Method

For any supply above a few tens of watts, the cooling method drives the layout more than the schematic does. Convection, forced air, and liquid cooling produce very different placement rules. With natural convection, the hot components must be spread out and given a clear vertical path for air to rise, which usually means a taller, narrower board. With forced air, the opposite is often better: group the dissipating parts along the airflow so the air heats up once rather than being pre-heated before it reaches the hottest device. Fans add their own constraint, since the intake and exhaust must not be blocked by a transformer or a tall capacitor.

Copper is part of the thermal design. Thermal vias under a surface-mount device carry heat to inner and bottom copper, and the number of vias matters more than their individual size once the pitch is fixed. A device rated for a given power in still air can often handle noticeably more with a well-viaed copper pad, but only if that copper is not isolated by a thermal relief that was left at the default setting.

EMC Details That Get Missed

Two habits prevent most of the emissions problems in a power layout. The first is to avoid abrupt changes in the width of a power conductor. A trace that steps from 3 mm to 1 mm at a pad presents a discontinuity that reflects high-frequency energy back into the loop; taper it instead. The second is to keep circuits separate even when they share a net in the schematic. A large current, a small current, and a sense signal may all connect to the same node, but if they are laid out as one shared conductor, the shared impedance couples them. Give each its own path back to the common point, and let them meet only where the schematic says they must.

Stitch the return plane with vias along the edges of the power stage and around the isolation barrier, and keep the loop formed by the input filter short and close to the connector. These steps do not depend on the controller or the topology, and they are the ones that most often decide whether the first EMC scan passes. Broader techniques are collected in EMI suppression design principles and in radiated EMI in switching regulator layout.

FAQ

Should the power stage and the controller share one ground plane? They can share a plane, but they must not share conductors. Define a single connection point and bring the noisy return and the quiet return to it by separate paths.

How close does the input capacitor need to be? Close enough that the loop from the capacitor to the switch pins and back stays short and wide, typically within a few millimeters, on the same side of the board.

Why keep the sense pair differential? Because the reference moves with the switching current. A differential pair rejects that common-mode shift, while a single-ended trace translates it directly into a control error.

Can a slot in the board replace wider spacing? A slot increases creepage along the surface but does not change the clearance through air. Both values still have to satisfy the applicable safety standard for the working voltage and pollution degree.

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