From SoC Datasheet to Board Design Decisions

A processor datasheet runs to hundreds of pages, and most of the board is decided by a few tables inside it. Reading it in a defined order turns a datasheet into a set of design decisions rather than a reference to search.

Read the Feature Summary First

The first pages list the processor cores, the memory support, the interfaces and the video or graphics blocks. That summary decides whether the device can do the job before any detail is examined.

It also lists the package options and the temperature grades, which are constraints rather than choices. A device that is only available in a commercial grade will not be used in an industrial product without further discussion.

The Block Diagram

The block diagram shows how the internal blocks are connected and which of them share a bus. It explains the performance limits that the feature list does not mention.

Two interfaces that appear independent in the feature list may share one controller, so they can be used together only at a reduced rate. That limitation is usually visible only in the diagram and the table that follows it.

Pin Description and Multiplexing

Each pin has a table entry that gives its number, its type and the functions it can carry. Most pins support several functions, and the choice is made by a configuration register.

The multiplexing is what makes the pinout planning difficult. Two peripherals may be able to use the same pin, but not at the same time, and the restriction is described in the pin table rather than in the summary.

Pin Assignment Planning

Before the schematic is drawn, the required interfaces are listed and the pins that can serve them are identified. Where two interfaces conflict, one of them has to move or the package has to change.

Doing that work on paper costs an hour and prevents a schematic that cannot be laid out. The pin list is also what the layout engineer uses to plan the escape, so it belongs in the design record.

Package Size and Land Pattern

The package drawing gives the body size, the pitch, the ball or lead dimensions and the tolerance on all of them. Those figures are what the land pattern is calculated from.

The package also fixes the thermal pad area and the height. A device with an exposed pad needs the matching copper area under it and a via pattern that can carry the heat away.

Power Requirements

The power section of the datasheet lists the rails, their tolerances, their sequencing and their maximum current. It also gives the recommended decoupling values for each rail.

The recommended capacitor network assumes a particular layout. Where the board is more compact or more spread out than the reference, the network may need to change, and that judgement belongs to the board designer rather than to the datasheet.

Timing Parameters

Timing tables give the setup, hold and valid windows for each interface, together with the clock frequency at which they apply. Those numbers are the budget that the board has to satisfy.

The board contributes track delay, skew and crosstalk to that budget. Where the timing margin is small, the length matching and the reference plane requirements become part of the design rules for that interface.

Reference Schematic and Layout

The vendor supplies a reference schematic and, in most cases, a reference layout or evaluation board. Those documents are the fastest route to a working design in the critical sections.

Following the reference is most valuable in the memory, power and analogue areas. Departing from it everywhere is possible, but each departure should be a decision rather than an accident.

Configuration and Straps

Some pins are sampled at reset to select the boot source, the clock input or the interface mode. Those straps have to be set to defined levels on the board, usually with resistors rather than with direct connections.

A strap that is left floating is a common cause of a board that works on one unit and not on the next. The pull resistors belong in the schematic and their values belong in the design notes.

Absolute Maximum Ratings

The absolute maximum table defines the limits beyond which the device is damaged rather than merely out of specification. It is the basis for the protection design around the connectors.

An interface that leaves the board is clamped so that the pin never sees a voltage outside that table. The protection is part of the board design and is not supplied by the device.

Thermal Data

The thermal section gives the junction to ambient and junction to case resistances and the maximum junction temperature. Those figures, the ambient and the power dissipation together give the required copper area.

A device in a small package with no thermal pad may need a spreader or a heatsink. The calculation is worth doing at the start, because the answer changes the mechanical design.

Errata and Application Notes

The errata list describes known behaviour that differs from the datasheet, together with the workaround. It is the section that is most often skipped and most likely to explain an intermittent problem.

Application notes then describe how the device is used in a particular area, often with layout guidance. Reading them before the layout is faster than reading them after the board has been built.

Building the Design Checklist

From the tables above, a short checklist follows: the rails and their sequence, the straps, the clock source, the decoupling values, the timing budget for each interface and the thermal calculation.

That list is what the layout is checked against. The general review criteria used here are the same as those in our design quality notes and in the design and fabrication flow.

Configuration Registers and Firmware

The register map describes how the device is configured, and it is read by the firmware rather than by the board designer. It is still worth knowing which settings are fixed at reset, because those are the ones the board has to support.

A register that selects an interface mode is a decision that appears in both the schematic and the software. Recording it in the design notes prevents the two from disagreeing later.

Comparing Two Devices

Comparing datasheets side by side is easier when the comparison uses the same rows for each device: interfaces, package, power, timing margin and thermal performance. A table built in that order shows the trade quickly.

The comparison should include the support material as well, and the manufacturability rules for each package should be compared too, because a reference layout and a maintained errata list are worth more than a small difference in clock speed.

FAQ

Is the reference schematic compulsory? No, but it is validated. Any departure should be justified and checked against the timing and power tables rather than assumed to be equivalent.

Why do the recommended decoupling values change between designs? Because they assume a loop inductance. A layout that is more compact can sometimes use fewer, while one that is more spread out needs more.

How often is the errata relevant? Often enough that it should be read before the layout. Most of the items affect a peripheral or a mode, and the workaround is usually a software or a pin configuration change.