Standard PCB vs HDI PCB: Process Capability Compared
Process capability is the set of minimum features a fabricator can produce reliably, and it is the number that decides what a design can contain. A conventional board built with mechanical drilling and standard etching sits at one end of that scale; a high density interconnect board built with laser vias and sequential lamination sits at the other. The gap between them is roughly a factor of two in line width and rather more in via size.
The Numbers Compared
A standard process typically offers a minimum line width and spacing of 4 mil, a minimum mechanically drilled hole of about 0.2 mm, through vias only and layer counts up to around twelve. A high density process reaches 2 mil lines and spaces, laser vias of 0.075 to 0.1 mm, blind and buried vias, and layer counts above thirty.
Those numbers do not add up to a smooth scale. Between the two there are intermediate processes with 3 mil lines and finer mechanical drilling, and the practical limit is usually set by yield rather than by what the equipment can theoretically produce. A fabricator may be able to make one board at 1.5 mil lines and still decline a design that requires it across a whole panel.
Via Technology Is the Real Divide
The transition from mechanical to laser drilling is what defines a high density board. A mechanical drill has to pass through the entire panel or be stopped at a controlled depth, and its minimum diameter is limited by the bit and by the aspect ratio the plating process can fill. A laser drills one dielectric layer at a time and produces a much smaller hole, which is what allows a via to be placed inside a pad or between two fine pitch pads.
Blind and buried vias follow from that capability. They free routing channels on the layers the via does not pass through, which is the mechanism that lets a dense ball array escape on a small board. The structures and how they are chosen are described in via and stack selection.
Routing Density and Escape
Routing density is the practical result of the two capabilities. With 4 mil lines and mechanical vias, the number of traces that can pass between two pads on a 1 mm pitch is small, and a package with several hundred balls needs a large board. With 2 mil lines and laser vias, more traces fit in the same channel and vias can be placed inside pads, so the same package escapes on a much smaller area.
That density is what makes modern portable electronics possible. The same logic applies in reverse on industrial and power boards, where the components are large, the current is high and the routing is sparse: there, the standard process is both sufficient and cheaper, and adding high density capability provides no benefit. Placing vias inside pads is itself a design decision with process consequences, described in via in pad treatment.
Signal Integrity Consequences
High density construction changes the electrical behaviour as well as the geometry. Shorter connections mean less parasitic inductance and capacitance, a continuous ground plane can be placed close to a fine line signal layer to keep the impedance low and well defined, and the layer structure can be arranged so that every high speed signal has a reference plane directly adjacent. The result is better impedance control, lower loss and less crosstalk.
That is why high speed interfaces such as PCIe, DDR memory and 5G front ends are usually designed on high density stacks rather than on conventional ones. It is not only that the routing would not fit; the electrical performance required by those interfaces is easier to achieve when the reference planes can be placed where the design wants them, and the stackup choices are described in layer stackup planning.
Cost and Lead Time
A high density board costs several times more than a conventional one of the same size, and the difference is not only material. Laser drilling, sequential lamination, fine line imaging, tighter inspection and lower yield all contribute. Prototype quantities that cost tens of dollars on a standard process can cost hundreds on an HDI process for the same board outline.
Lead time extends as well, because each additional lamination cycle adds process time and each tightening of the design rules adds review. A standard four layer prototype can be produced in days, while a high density stack with multiple build-up layers is measured in weeks. Where the schedule is tight, that difference deserves to be weighed alongside the technical requirement.
Choosing a Process
Start from the largest constraint on the board, which is usually the escape routing under the biggest package. Count the signal rows that must leave the device and the channel width available between pads. If a standard process can route them, the extra capability of a high density stack is unnecessary, and the money is better spent on a thicker board, more copper or a better material.
Move to high density when the escape does not fit, when the board area is fixed by the enclosure, when the interfaces require impedance control that the standard stack cannot provide, or when the product would otherwise need more layers than the standard process supports. Those conditions usually arrive together, which is why the decision is rarely marginal.
It is also worth checking the fabricator before the design is fixed. A process capability table describes what a supplier can do routinely, and asking for a feature at the edge of it means the yield will be low and the price will reflect that. Confirming capability early is cheaper than redesigning a finished layout.
Inspection and Reliability
High density boards are harder to inspect as well as harder to build. The features are smaller than the resolution of a simple optical check, the vias are hidden inside the stack and the joints under a fine pitch package cannot be seen at all. Inspection therefore relies on automatic optical systems with sufficient resolution, X-ray for registration and for the ball array, cross sectioning of coupons and electrical test on every panel.
Reliability follows the same pattern. A microvia that is not completely filled, a thin plated barrel in a high aspect ratio hole or a delamination between build-up layers may pass every electrical check and fail later under thermal cycling, which is why the acceptance criteria are tighter and the coupon testing more extensive on this class of board. Where the product operates in a demanding environment, the additional cost of that verification is part of the design rather than an optional extra.
FAQ
What is the minimum line width on a standard board? Around 4 mil for a conventional process, with 3 mil available from fabricators whose etch control is better. High density processes reach 2 mil routinely and 1.5 mil on advanced lines.
What is the smallest laser via? Typically 0.075 to 0.1 mm. The limit is set by the laser, the dielectric thickness it has to penetrate and the plating process that has to fill the resulting hole.
Is an HDI board always better than a standard one? No. It offers more routing density and better high speed performance at a substantially higher cost. A design that fits on a standard process and meets its electrical requirements should stay there.
How much more does an HDI board cost? Several times the price of an equivalent standard board, reflecting laser drilling, sequential lamination, finer imaging, more inspection and lower yield. Lead times are longer for the same reasons.
