Copper Thickness and Via Plating in Multilayer PCB Fabrication
A multilayer PCB is not a two layer board with more layers. The extra layers bring plated holes with a higher aspect ratio, inner layer copper that has to survive lamination, and impedance requirements that only hold if the whole process holds. The difference shows up in the finished board as reliability rather than as appearance, which is why it is worth understanding what separates a production fabricator from one that is built around speed.
Two Kinds of Fabrication Business
A quick turn shop and a production fabricator are not the same business at different price points. The quick turn model is built around a volume of orders and fast dispatch: a large number of small jobs, most of them simple consumer boards, are panelised together and run through a flow tuned for turnaround. That model is efficient at what it is designed to do, and the compromise it makes is in the engineering and process control applied to each individual job.
The production model runs fewer jobs with more attention per job. Engineering is done in house by staff accountable for the result rather than outsourced file by file. Process parameters are set for the material and the layer count rather than standardised across a mixed panel. None of that is visible in a delivered board until the board is stressed, which is exactly the point.
Copper Thickness in the Hole
The most consequential difference is the plating in the barrel of a via. Copper thickness in the hole is what carries current between layers and what resists the thermal expansion that cracks a barrel over a product’s life. The IPC requirement is a minimum of 18 micrometres of copper in the hole. A production multilayer fabricator typically averages 20 micrometres or more, and may run higher on boards that will see thermal cycling.
Hitting that figure consistently requires a plating line, chemistry control and inspection, because thickness varies with the aspect ratio of the hole and with the current distribution across the panel. A process that substitutes a conductive film for electroplated copper can be fast and inexpensive, and the hole wall it produces is thinner and rougher. The difference is measurable in a microsection, which is why a supplier’s willingness to provide a cross section is informative in itself. How plating defects arise and how they are prevented is described in copper plating defects and prevention.
The Via Fill Question
Via treatment is a good test of how a fabricator is set up. Tenting a via, where solder mask simply covers the opening, is the least expensive option and is adequate for many boards. Via plugging, where the barrel is filled with solder mask or a dedicated plugging material, is a separate operation with its own step in the solder mask sequence, and it is the option that matters when a via sits in a pad or inside the area of a BGA.
The reason is assembly rather than appearance. An unfilled via near or in a pad creates a void for solder to escape into during reflow, and a joint that loses solder into a via may look sound and fail later. Under a large area array package that defect is difficult to detect and expensive to find in the field. Filling the via restores a flat surface and keeps the solder where it belongs, and the process is described in electroplating and via filling in HDI. Whether the via should be in the pad at all is a separate design decision, covered in via in pad or plated through.
Impedance Control
Impedance control is often described as something a fabricator either can or cannot do, which misses the point. Single ended impedance depends mainly on the trace width and the dielectric thickness, and many shops hold it without difficulty. Differential impedance also depends on the gap between the two traces and on how evenly the prepreg flows around them during lamination, which makes it sensitive to the accuracy of the etching and to control of the press cycle.
For a fabricator running many customer designs on one panel, those variables are set by the mix of the panel rather than by the needs of one board. That is why a supplier may produce a single ended coupon that measures correctly while the differential pairs on the same board are outside tolerance. The reliable test is a coupon taken from the same panel, measured, with the results supplied alongside the boards.
Inner Layer Copper Weight
Inner layer copper is rarely discussed and frequently assumed. A board quoted as a four or six layer design may be built with half ounce inner layers as a default, and that default is often not stated on the quotation. Half ounce copper is about 17 micrometres thick. It is adequate for many signal layers and marginal for power distribution, where current has to travel through narrow necks between planes and through the via barrels that connect them.
The consequence is a board that works on the bench and runs warm in production, or one whose power planes sag under load because the copper was chosen for price rather than for current. If the design carries any significant current on an inner layer, the copper weight should be specified and confirmed rather than inherited.
Material and surface finish follow the same pattern. A finish specified by thickness, such as an immersion gold layer held above a stated minimum, and a solder mask chosen for adhesion and for its behaviour during assembly, are decisions a production fabricator can hold consistently and a volume driven process may not. The point is not that one business model is careless and the other virtuous. It is that a process is built for a purpose, and a board should be matched to a process that was built for its purpose rather than to the lowest quotation.
What to Ask a Supplier
Four questions separate a supplier that can build a production multilayer board from one that cannot, and none of them requires technical knowledge to ask. What is the average copper thickness in the holes, and can you supply a microsection? Can you build and measure differential impedance coupons? Do you fill vias, and what does that add to the cost? And what is the inner layer copper weight on the quoted construction?
The answers are informative even when they are not the ones the design wanted, because a supplier who answers precisely is a supplier who controls the process. Where the board is a prototype rather than a production order, the same questions in a smaller form still apply, and the points worth agreeing in advance are set out in multilayer PCB prototype requirements.
FAQ
What copper thickness should a via barrel have? The IPC minimum is 18 micrometres in the hole. Production multilayer work typically averages 20 micrometres or more, and a microsection from the panel is the way to confirm it.
Why does differential impedance need more process control than single ended? Because it depends on the gap between the traces and on how evenly the prepreg flows around them during lamination, in addition to the trace width and the dielectric thickness.
Does every via need to be filled? No. Filling matters where a via is in or near a pad and solder must not drain away, particularly inside a ball grid array. Tenting is adequate elsewhere.
Is half ounce inner layer copper a problem? Not for signal layers in most designs. It becomes a problem for power distribution, where the current path runs through the copper and through the vias that connect the planes.
