How Drilling Defects Ruin a PCB
A drilled hole is the most heavily loaded feature on a printed circuit board. It interrupts the laminate, it has to be plated uniformly through its entire depth, and it has to survive thermal cycling for the life of the product. When drilling defects appear they rarely announce themselves immediately; they show up later as an intermittent open, a measling plane or a barrel crack after a few hundred temperature cycles.
What the Drill Actually Has to Achieve
A drill has three jobs: remove material cleanly, hold position relative to the inner layer targets, and leave a wall that plating can adhere to. The first is mechanical, the second is a registration problem and the third is a materials problem, and they interact. A bit that is slightly worn will hold position less accurately, generate more heat, and leave a rougher wall than a fresh one.
None of these requirements is absolute. Each has a tolerance, and the tolerance is set by the class of product. A board with generous annular rings can absorb more registration error than a high-density board where a via sits between two traces, which is why the same drill programme produces acceptable boards on one design and failures on another.
Registration Error and Its Causes
Drill registration drifts with the expansion and contraction of the panel as it passes through the process. Laminate absorbs and releases moisture, copper and laminate expand at different rates, and each heating step leaves the panel slightly different from the one before. The drill programme is corrected for these shifts, and the correction has to be based on measurements of the actual material rather than on a generic factor.
Registration errors are also cumulative in multilayer boards. A hole that is well centred on one inner layer can be off on another, and the resulting variation in annular ring is invisible until a microsection is taken. This is the reason registration coupons are included on the panel edge, where they can be measured without destroying the product.

Smear, Resin and Hole Wall Condition
Drilling generates heat, and heat softens the resin. The softened resin can be smeared across the inner layer copper by the bit, creating a layer that is electrically insulating but visually indistinguishable from a clean wall. If the smear is not removed before plating, the connection between the plating and the inner layer is made through a contaminated interface.
Desmear is the process step that removes it, and its effectiveness depends on the resin system. Epoxy responds differently from a high-temperature or halogen-free laminate, and a desmear recipe developed for one material may be marginal for another. Our notes on copper plating defects prevention explain how the wall condition propagates into plating voids and barrel cracks.
Nailheading and Inner Layer Damage
Where a drill exits an inner layer it can push copper ahead of the cutting edge, producing the flared shape known as nailheading. A small amount is normal and is accounted for in the annular ring budget. Excessive nailheading reduces the copper width that remains and can bring the clearance to the adjacent plane or trace below the design minimum.
The condition worsens with worn bits, with aggressive feed rates and with ductile copper. It is detected by microsection, and the useful measurement is not whether nailheading exists but whether the remaining copper still meets the minimum width required for the net, including the current it must carry.
Aspect Ratio and Plating Quality
Aspect ratio governs whether plating solution can circulate inside the hole, and it is the single most useful number to check before a stackup is agreed. A high aspect ratio hole tends to have thinner plating in the middle than at the surface, so the barrel’s weakest point sits where the thermal stress is highest. The accepted limit depends on the process, but the design implication is always the same: keep the ratio within the range the fabricator has demonstrated.
Where the ratio cannot be reduced, the fabricator has options. Thinner panels, larger holes, specialised agitation and additional plating time can all help, but each of them changes the cost and the lead time. Our notes on multilayer PCB manufacturing challenges describe the trade-offs involved.

Back Drilling and Stub Effects
Back drilling removes the unused portion of a plated hole after plating, leaving a shorter barrel that does not act as a stub. The technique is used on high speed channels where the stub would create a resonance within the band of interest. It is a drilling operation with its own defects, and it introduces a new risk: the depth has to be controlled so that the stub is removed without damaging the layer that must remain connected.
Where back drilling is specified, the design has to leave room for the depth tolerance. A net that needs the full thickness of a layer for its connection cannot tolerate a drill that overshoots, and the fabricator needs the stackup dimensions to calculate the depth rather than estimating from the finished board thickness.
Detecting Defects Before They Ship
Detection is a combination of process control and final inspection. Microsections taken at intervals show plating thickness, wall quality and registration. Cross sections of a sample hole reveal whether the plating is continuous, and electrical testing catches opens, but neither detects a thin barrel that will crack after thermal cycling.
For boards intended for harsh environments, thermal cycling of a sample before microsection is the only step that predicts field behaviour. Our notes on PCB production quality control describe how these checks are scheduled without holding the whole order.
Design Decisions That Reduce Drilling Risk
Most drilling risk is designed in before the drill ever touches the panel. Keeping the aspect ratio modest, providing generous annular rings, avoiding minimum-diameter holes where a larger one would fit, and distributing vias rather than clustering them all reduce the chance that a small process variation becomes a scrap panel.
It also helps to tell the fabricator which holes are critical. A design that marks controlled-impedance and high-current nets, and identifies the holes whose yardstick is the plating thickness rather than the drill diameter, lets the process engineer apply the attention where it changes the outcome.
Process Control and Verification
Reviewing the design before the data is released is far cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance.
FAQ
What causes a hole to crack after assembly? Usually a thin or voided barrel combined with thermal expansion during assembly or service. The defect is created at plating, but it fails later, which is why microsection plus thermal cycling is the standard verification.
How much nailheading is acceptable? As much as the remaining annular ring can absorb. The limit is a design question, not a process preference, and it should be stated as a minimum residual copper width in the fabrication notes.
Can back drilling be added later? It is a process step rather than a repair, so it has to be planned with the stackup. Adding it after the panels are drilled means the depth cannot be referenced to inner layers reliably.



