Via Filling and Planarization for Stacked Via Designs

An unfilled via is a hole with copper on its walls and nothing in the middle. That is perfectly acceptable on an ordinary board, but it becomes a problem the moment a designer wants to place a pad directly above it, or stack one via on top of another to reach deeper into the stack. Via filling and planarization are the processes that turn a hole into a flat, mechanically supported feature that can be built upon.

Why Vias Need Filling

There are two motivations, and they are often confused. The first is electrical and mechanical: a filled via supports a solder joint or a stacked via above it, preventing the solder from wicking down the barrel and preventing the drill from wandering when the next hole is drilled. The second is cosmetic and processing: a filled and planarized via allows a smooth surface for subsequent lamination or for solder mask printing.

Where a via sits inside a thermal pad and must be soldered over, filling is mandatory. An open via in that location draws solder away from the joint during reflow, producing a void that is invisible from the surface and disastrous for thermal performance. The same applies to via-in-pad designs on fine pitch ball grid arrays, where a starved joint can be the difference between a working board and a field return.

Types of Fill: Resin, Paste and Plating

Conductive epoxy, often called a resin plug, is the most common material. It is applied by squeegee or dispenser, cured, and then planarized so the surface is flat. It is electrically non-conductive in most formulations, which is acceptable because the copper barrel already carries the current.

Conductive paste and copper plating are the alternatives. Plated fill, sometimes called copper plugging, brings copper up through the hole so the via becomes a solid copper column with excellent thermal conductivity. It is more expensive and more demanding to execute, but for high current and high thermal density designs it is often the only option that meets the requirement.

Planarization and Surface Flatness

Filling without planarization leaves a bump or a dimple. Planarization removes the excess material so that the via surface is flush with the surrounding copper, typically within a few micrometres. The tolerance matters because the next process step either laminates another layer or prints solder paste, and both are sensitive to surface height variation.

A dimple is generally less harmful than a bump on an inner layer, because the following lamination can fill a shallow depression with resin. On an outer layer receiving solder paste, however, a dimple reduces the paste volume over the via and can produce a void. Fabricators usually specify a maximum dimple depth as a percentage of the via diameter.

Stacked Via Constructions

A stacked via places one via directly on top of another across sequential build-up layers, which allows a connection to be routed through several layers without consuming lateral space. This is the primary technique for achieving high routing density in HDI designs, and it depends entirely on the quality of the fill beneath.

The critical requirement is that the fill must be solid and well bonded, because the subsequent drilling operation will pass through it. A void or a soft spot in the plug causes the drill to deflect, and the resulting hole may miss the target pad below. Stacked via constructions therefore tighten the requirements on both the filling process and the inspection that follows it.

Process Steps and Controls

The sequence is usually fill, cure, planarize, then continue with the next build-up. Each step has variables that affect the result. The fill must be free of bubbles when applied, the cure must be complete enough that the material does not shrink later, and the planarization must remove material without smearing it into adjacent features.

Cure control deserves particular attention because incomplete cure produces a plug that continues to shrink and outgas during subsequent lamination. Outgassing creates voids and can delaminate the layer above. The cure schedule should be validated against the actual thickness and geometry of the vias being filled, not only against the material datasheet.

Voiding and Its Consequences

Voids in a filled via come from entrapped air during application, from solvent that was not removed before cure, or from shrinkage. Small voids scattered through the plug are usually tolerable, but a void that reaches the barrel wall or that sits under a stacked via is a functional defect.

The consequences vary with location. A void beneath a solder pad creates a path for solder to drain and produces a starved joint. A void in a stacked via can cause the next drilled hole to wander. A void that connects to the barrel can trap plating chemistry and cause corrosion later. Because the failure modes differ, the acceptance criteria should also differ by location rather than applying one rule.

Inspection Methods

Cross sectioning remains the definitive method, because it shows whether the plug is solid and how well it bonded to the barrel and the surrounding laminate. It is destructive, so it is applied to samples. Micro-sections taken before and after planarization reveal whether the process is removing the right amount of material.

Non-destructive options include X-ray, which detects large voids and density variation, and acoustic microscopy, which is more sensitive to thin separation layers. Neither replaces a section for a definitive answer, but both are useful for screening a lot before committing to destructive analysis. Inspection of filled vias sits alongside the general techniques covered in this guide to plating thickness verification.

Design Rules for Filled Vias

Design rules for filled vias are more restrictive than for open ones. Via diameter, pad size, the required fill type and the acceptable dimple should all be specified, and the HDI via construction should be agreed with the fabricator before the layout is frozen. Assuming that a standard via can simply be filled usually leads to a redesign.

Spacing rules also change, because a filled via that will be drilled again needs more copper around it to protect against drill wander. Where the fill must be plated over, additional process steps are required and the panel may need extra handling to protect the surface. All of these constraints belong in the fabrication drawing, not in a verbal agreement.

Cost and Reliability Trade-offs

Filling adds process steps, and each step adds cost and yield risk. A design that fills every via wastes money, while a design that fills none may be unmanufacturable. The sensible approach is to fill only where required: under solder pads, beneath stacked vias and in any location where an open hole would interfere with the next process step.

Reliability generally improves with proper filling because the via becomes a solid feature rather than a hollow tube, which reduces the strain on the barrel during thermal cycling. That benefit is real but should not be assumed; a poorly filled via with voids can be worse than an open one. Verifying the process with sections before committing a product to it is the only reliable way to capture the benefit. Hole geometry fundamentals are covered in this plated hole guide.

FAQ

Do all vias need to be filled? No. Most vias on an ordinary board can remain open, because nothing is placed on top of them and the copper barrel provides the connection. Filling is required under solder pads, beneath stacked vias, and wherever an open hole would interfere with lamination or solder mask printing.

Is a resin plug electrically conductive? In most formulations it is not, and that is not a problem because the plated barrel already carries the current. Conductive fill materials exist and are used where the via must also conduct heat or carry current through the plug itself, but they are less common and are specified explicitly when required.

Why does dimple depth matter? Because the surface above the via must be flat enough for the following process. A deep dimple under a solder pad reduces the available paste volume and can leave a void in the joint, while a large dimple before lamination can trap air and create a delamination site. Both are controlled by specifying a maximum dimple depth.