Antipad Design: Clearance, Ring and Plane Integrity

Every via in a plane requires a clearance hole around it, called an antipad, which removes copper from the plane. The size of that hole determines whether the design works and whether the plane still does its job.

What the Antipad Must Guarantee

The antipad must be large enough that the via’s annular ring does not touch the plane, with margin for the registration tolerance of both the drill and the plane image.

The margin is the sum of the drill tolerance, the layer to layer registration and the etching tolerance on the plane image. A design that assumes perfect registration produces boards with intermittent shorts.

The clearance must also satisfy the voltage requirement where the via carries a potential different from the plane. The rule is the same as any creepage and clearance rule. Our aspect ratio notes describe how the drill tolerance relates to the hole geometry.

What an Oversized Antipad Costs

Removing copper from the plane interrupts the return path for the traces above it. A dense array of vias with generous antipads leaves the plane as a mesh, and the return path for a trace above becomes a series of detours.

The plane’s capacitance to the adjacent plane is also reduced, because the capacitance is proportional to the remaining area.

The power distribution is affected in the same way, since the plane is both the reference and the supply conductor in many designs. Our high speed design rules notes describe the return path requirement.

Sizing the Antipad

The size is normally stated as a pad diameter, which is the antipad diameter, and it is set from the via pad diameter plus twice the required clearance.

The clearance is chosen from the fabricator’s registration capability for the specific stack. A thicker board with more layers has a larger registration error and needs a larger clearance.

Where the design needs a small antipad, the fabricator’s capability should be requested rather than assumed. A clearance that is below the capability will reduce the yield and may produce shorts that are not detected at test. Our plating notes describe the related hole geometry.

Vias in Planes Deliberately Connected

Where a via must be connected to the plane, no antipad is used and the via has a pad the same diameter as the plane connection requires. These vias are usually stitching vias or thermal vias.

The distinction between a connected via and an isolated one must be clear in the design, because the two are identical apart from the pad. A rule that removes antipads globally creates shorts.

The connected vias should be the ones the design intends, and the rest should have antipads large enough to guarantee isolation. Our hole copper notes describe how the barrel is formed in each case.

Vias in a Split Plane

A via that passes through a plane split must not be connected to either side, and its antipad must clear both. A via placed on the boundary between two planes must have clearance from each.

The crossing point of two planes is a sensitive location for the return path, and a via there should be treated as a signal that crosses the split.

Where the two planes are at different potentials, the clearance must satisfy the voltage requirement, which often forces the vias away from the boundary.

Verification

The verification is a microsection through an array of vias, measuring the remaining ring on the via and the clearance to the plane.

A continuity test between the via and the plane catches a short that has occurred, and it does not prove that the clearance has margin.

Where the design is dense, the measurement should be made at the corner of the panel, where the registration error is largest. A measurement in the centre of the panel shows the best case.

Practical Rules

Set the antipad from the fabricator’s registration capability for the stack, and state it in the design rules rather than per via.

Keep the antipad no larger than necessary, because the plane’s integrity is a performance requirement and not only a manufacturing one.

Check the plane continuity over the length of every high speed trace, and reroute a trace where the remaining copper no longer provides a solid reference. Our plating thickness notes describe how the copper in the barrel is specified.

Process Control and Verification

On a design of this kind, clearance is the item that decides how the rest of the board is arranged. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule. The process window is set by the narrowest step in the flow, so an improvement anywhere else shows up as margin rather than as yield until that step is addressed.

A short note on the drawing about handling, storage or packaging is often worth more than an extra decimal place on a tolerance. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance.

A stack-up that is drawn rather than described removes most of the ambiguity from a quotation, and it lets the fabricator price the board against the dielectric and copper weights that will actually be used. Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design.

Process Control and Verification

On a design of this kind, clearance is the item that decides how the rest of the board is arranged. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule. The process window is set by the narrowest step in the flow, so an improvement anywhere else shows up as margin rather than as yield until that step is addressed.

A short note on the drawing about handling, storage or packaging is often worth more than an extra decimal place on a tolerance.

Process Control and Verification

On a design of this kind, clearance is the item that decides how the rest of the board is arranged. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule. The process window is set by the narrowest step in the flow, so an improvement anywhere else shows up as margin rather than as yield until that step is addressed.

FAQ

Does a larger antipad improve the yield? It reduces the risk of a short at the cost of plane integrity. The correct size is the smallest that the fabricator can hold with margin.

Should all vias have the same antipad? No. Stitching and thermal vias are connected and have no antipad, while signal vias that must be isolated have one.

What does gopcb provide for antipad design? We provide antipad sizes based on the registration capability of the specific stack, plane integrity checks along the critical traces, sectioned verification of the clearance at the panel corners, and continuity testing of the connected vias.