Five-Layer PCB: Stackup, Advantages and Design Notes

A five-layer PCB sits in a gap that a surprising number of designs fall into. Four layers are not enough to route the signals with a clean reference, and six layers cost more than the design can justify. The odd count raises an immediate question about how the board is actually built, and the answer explains both the advantages and the cautions that come with it.

What Makes a Five-Layer Board Unusual

Conventional lamination prefers an even number of copper layers, because the stack is assembled symmetrically around a central core and symmetry keeps the panel flat through the press cycle. An odd count breaks that symmetry, which is why standard constructions start at four, six or eight layers.

A five-layer board is therefore produced in one of two ways. It can be a four-layer core with one additional copper foil laminated to one side, known as a foil-cored build, or it can be a six-layer construction with one layer left unetched. The first is cheaper and is the usual approach, and the second is used when the design may grow later.

Typical Stackup Arrangements

The common arrangement is signal, ground, signal, power, signal. That gives the two inner signal layers a solid reference on at least one side, keeps the outer layers available for components and short connections, and provides continuous planes for both supply and return.

A second arrangement places the power plane directly beneath the ground plane to maximise the distributed capacitance between them, at the cost of making one inner signal layer reference a power plane instead of ground. That trade is acceptable when the supply is quiet and the layer carries mostly low-speed routing. General rules for these arrangements are set out in the guidance on layer stackups from one to eight layers.

Signal Integrity Benefits

The first benefit is a dedicated reference. With a solid plane adjacent to each inner signal layer, every trace has a defined return path directly underneath, which controls impedance and limits the loop area that radiates. That alone removes a large class of intermittent problems.

The second benefit is separation. Signals that must not couple can be routed on layers separated by a plane rather than side by side, and the additional routing capacity means fewer compromises such as long parallel runs. Together those two effects make multilayer design rules easier to satisfy than on a four-layer board.

Power and Thermal Benefits

A dedicated power plane lowers the impedance of the supply network and spreads decoupling capacitance across the whole board rather than concentrating it near a few capacitors. Load transients are supplied locally, which reduces the voltage excursion seen at the far end of the board.

Thermal behaviour improves for the same structural reason. Extra copper on inner layers spreads heat laterally, and thermal via arrays can connect a hot component through the stack to copper on both outer layers, lowering the junction temperature without adding a heat sink.

Density, Size and Cost Position

The additional routing layer usually allows a smaller board, because the connections that forced a larger outline can move to an inner layer. For a space-constrained product, the saving in board area can offset part of the extra fabrication cost, particularly when the enclosure is sized around the board.

Against a six-layer board the saving is straightforward. One less copper layer and one less lamination step reduce both material and processing cost, and for a design that only needed a little more routing capacity than four layers provide, the five-layer option delivers most of the benefit at a lower price.

Applications

Automotive electronics is a natural fit, because engine control units, infotainment modules and driver assistance systems need clean references for mixed signal content while meeting strict cost targets. Industrial control equipment follows the same pattern, combining high-current switching with sensitive measurement on one board.

Consumer and IoT devices use the construction when a wearable or compact module needs more routing than four layers allow but cannot absorb the cost of six. Portable medical devices occupy similar ground, where reliability requirements are high and board area is at a premium.

Design Notes: Layer Assignment and Impedance

Decide the stackup before routing begins, and assign functions to layers deliberately. Route the highest-speed nets on the inner layers where the reference plane is solid and uninterrupted, and reserve the outer layers for connections that are short, low-frequency or that genuinely need surface access.

Impedance has to be resolved against the dielectric thicknesses actually available in the construction, so confirm those with the fabricator rather than assuming the values from a different stackup. Balancing copper distribution across the layers matters more than usual here, because the asymmetry inherent in an odd layer count makes warpage a real risk.

Design Notes: EMI and Decoupling

Place each decoupling capacitor at the pin it serves, on the same side of the board where possible, and give it the shortest possible connection to both the power plane and the ground plane. Distance from the pin increases the loop area, and loop area is what turns a capacitor into an ineffective part at high frequency.

Guard traces tied to ground around sensitive or noisy nets reduce coupling, and ground stitching vias around the board edge suppress edge radiation. The overall approach to keeping the planes clean is covered in the notes on power plane integrity, which apply directly to this stackup.

Controlled Impedance on an Odd Layer Count

Controlled impedance on this stackup follows the same principle as any other: fix the target, choose the dielectric thickness, then calculate the trace geometry that achieves it. The complication is that the dielectric thicknesses available in a foil-cored construction are less standard than in a symmetric build, so the fabricator should confirm them before routing starts.

The inner signal layers are the easiest to control, because each one sits directly against a plane. Outer layer traces may reference a thicker dielectric, which produces a wider trace for the same impedance and, in practice, a geometry that is more tolerant of the etch variation the process will inevitably introduce.

The real value of controlled impedance here is continuity. If a critical line changes reference between layers, its impedance changes with the thickness of the new dielectric unless the trace width is adjusted at the transition. Keeping each impedance-controlled net on one layer for its full length avoids that calculation entirely and is usually the simplest way to guarantee a predictable result.

Comparing With Four and Six Layers

Against four layers, the gain is one dedicated routing layer and a more forgiving reference structure. The additional inner layer absorbs the nets that would otherwise force compromises, such as long parallel runs that raise crosstalk or a signal forced to cross a plane split.

Against six layers, the gain is cost and process simplicity. One less copper layer means one less imaging and etching step, one less lamination interface and fewer opportunities for registration error across a large panel.

The decision rule is straightforward. Count the nets that cannot be routed on a four-layer stackup without breaking a reference plane. If that number is small and localised, five layers will handle it comfortably. If the routing needs a second full inner signal layer with its own ground reference, six layers is the honest answer.

FAQ

Why not simply use four layers? If the design routes comfortably on four layers with a continuous reference plane underneath every critical signal, use four. The fifth layer earns its cost only when the routing or the reference continuity genuinely demands it.

Is a five-layer board as flat as a six-layer one? Less so, because the stack is asymmetric. Balanced copper distribution, a controlled press cycle and a fabricator experienced with foil-cored builds keep warpage within the tolerance the assembly process needs.

Can the spare layer be used for shielding instead of routing? Yes. Leaving one layer as a nearly solid grounded shield is a legitimate use, and it can be a better choice than filling it with low-priority routing that breaks the plane.