Impedance Continuity in PCB Design

A trace has a characteristic impedance only while its geometry is consistent. The moment the return path changes, the width changes or a via interrupts the structure, the impedance changes with it, and the signal reflects. Impedance continuity is the practice of keeping that structure consistent along the whole path from driver to receiver.

What Breaks Continuity

The common causes are a change of reference plane, a layer transition, a plane split crossed by the trace, a change of trace width, and a connector whose pin geometry differs from the trace. Each of them produces a local impedance change, and each has a remedy.

Some of these are unavoidable. A trace cannot always stay on one layer, and a board cannot always have a single continuous plane. The design work is in recognising the discontinuities, making them as small as possible and compensating where they cannot be removed.

Reference Plane Changes

When a signal via passes from a layer referenced to one plane to a layer referenced to another, the return current must move between those two planes. If there is no connection between them near the via, the return current takes a long path, and the resulting loop is both an impedance discontinuity and a radiator.

Placing a stitching via or a capacitor adjacent to the signal via gives the return current a short path. The distance is the whole point: a stitching point a centimetre away has already stopped being local, and the benefit is lost. Our article on EMC design techniques describes the same mechanism from the emissions side.

Plane Splits and Their Cost

A split in a plane is a wall the return current cannot cross. Any trace routed over it loses its reference for the width of the split, and the return current detours around the end of the gap.

Where a split is required, the traces that must cross it should be routed on a layer whose reference is continuous, or the crossing should be bridged so that the return has a defined path. Preventing the crossing during the layout stage costs nothing; fixing it afterwards costs a revision. Our layer assignment notes describe how the plane arrangement is decided.

Via Transitions and Stubs

A via adds capacitance where it passes through the planes and inductance along its barrel. In a thin board those effects are small. In a thick board, the portion of the barrel below the last layer the signal uses becomes a stub, and the stub resonates at a frequency determined by its length.

Back drilling removes the unused barrel, and blind or buried vias avoid creating it. Both add cost, and the choice should follow from the highest significant frequency of the signal. For a signal whose stub resonance lies well above its content, an ordinary through via is adequate. Our notes on blind and buried vias describe the structural options.

Width Changes and Routing Constraints

Where a trace must narrow, for example to escape between pads, the impedance rises at that point. Keeping the narrow section short limits the effect, and tapering the transition rather than stepping it spreads the change over a longer distance.

The escape itself is often the reason the layer count is what it is, because reaching the inner layers from a fine pitch array requires either narrow traces or additional layers. Accepting wider escapes and more layers is sometimes the cheaper way to preserve continuity. Our high speed routing article covers the constraints that follow.

Connectors and Interfaces

The connector is a discontinuity that is easy to overlook because it is a purchased part rather than a layout feature. Its pin geometry, its internal construction and its launch into the board all differ from the trace, and the effect grows with frequency.

Where the interface runs fast, the connector should be selected for its electrical performance rather than for its pin count, and the launch should be designed with the same care as the trace. Ground pins adjacent to signal pins keep the return local through the connector, which is the same principle as everywhere else on the board. Our transmission line article describes how those launches are evaluated.

Verifying Continuity

Continuity can be checked before fabrication with a field solver, and after fabrication with a time domain reflectometer on a coupon. Both produce an impedance profile along the trace, and the profile shows the discontinuities as deviations from the target.

Measuring a coupon rather than the board itself is normal, and it is why the coupon should include the structures the design actually uses. A coupon that verifies the nominal trace and not the via transition verifies the easy half of the problem. Our electrical test coverage article describes what the fabrication test can reach and what it cannot.

Via Stub Effects on a Thick Board

A via stub is the portion of the barrel that extends beyond the last layer the signal uses. It behaves as a length of transmission line with one open end, so it reflects energy back at the frequency where its length is a quarter wavelength, and it degrades the signal above that point.

On a thin board the stub is short enough to be irrelevant. On a thick board with signals running on inner layers, the stub can be several millimetres long and its resonance can fall inside the signal content. Back drilling removes it, and blind vias avoid creating it. Our blind and buried via notes describe when each is justified.

Differential Continuity

A differential pair has two traces and two return paths, and continuity applies to the relationship between them as well as to each trace individually. Skew between the two converts differential signal into common mode, which radiates and which the receiver rejects poorly.

Skew is introduced wherever the pair is not routed together, which includes the escape from a package, the transition through a via and the entry into a connector. Compensating for it at the point where it occurs keeps the pair balanced, whereas accumulating the compensation at one end leaves the imbalance in place along the route.

Where a design has many transitions, the cumulative effect is what matters rather than any single one. A route that changes layers four times with a stitching via at each transition behaves very differently from one that changes layers four times without them, even though the trace geometry is identical.

The useful habit is to count the discontinuities during the layout rather than after it. A transition without a nearby return path is a defect waiting to be measured, and it costs nothing to fix while the trace is still being routed.

FAQ

Is a small discontinuity acceptable? Usually yes, if it is short relative to the wavelength of the highest significant frequency. The question is whether the reflection it produces stays inside the budget.

Can a plane split ever be crossed safely? Only if the return current has a nearby defined path, such as a stitching capacitor that bridges the gap for the frequencies involved.

Do all high speed traces need back drilling? No. Back drilling is justified when the stub resonance falls within the signal content, which depends on the board thickness and the data rate.