In high-frequency PCB applications, via quality can directly affect signal integrity, insertion loss, and impedance consistency. This becomes increasingly important in RF, high-speed digital, and millimeter-wave designs, where even small discontinuities in the signal path can contribute to measurable transmission loss.
When a high-frequency differential pair passes through a plated through-hole or via transition, excessive via wall roughness can increase conductor loss and create additional impedance discontinuities. The problem is not simply related to drilling burrs. It can also originate from drilling conditions, desmear and micro-etch processes, electroless copper deposition, electrolytic copper plating, and the uniformity of the copper layer inside the hole.
Why Via Wall Roughness Increases High-Frequency Signal Loss
The fundamental mechanism is related to the skin effect and the way high-frequency current is distributed along the conductor surface.
As frequency increases, current becomes increasingly concentrated near the conductor surface. The effective current-carrying region therefore becomes much smaller than the entire copper cross-section. Surface roughness forces the current to follow a longer and more irregular path instead of traveling along an ideal smooth conductor.
This can increase the effective conductor loss of the transmission path.
For a simplified conductor model, skin depth can be expressed as:
[\delta=\sqrt{\frac{2\rho}{\omega\mu}}]
where δ is skin depth, ρ is conductor resistivity, ω is angular frequency, and μ is magnetic permeability.
For copper, the skin depth becomes only a few micrometers at hundreds of megahertz and can fall below one micrometer at tens of gigahertz. Consequently, copper surface morphology becomes increasingly relevant in high-frequency designs.
However, it is important not to treat a single roughness-to-skin-depth ratio as a universal failure threshold. The actual impact depends on the copper profile, plating morphology, current distribution, frequency, via geometry, return path, and electromagnetic field distribution.
At very high frequencies, roughness can contribute to increased conductor attenuation through several mechanisms:
- Increased effective current-path length
- Higher effective AC resistance
- Additional electromagnetic scattering
- Localized current-density concentration
- Increased conductor loss around via transitions
The overall insertion loss of a high-frequency channel is the combined result of conductor loss, dielectric loss, via and connector discontinuities, radiation, and other structural effects. Therefore, via wall roughness should be evaluated as part of the complete transmission channel rather than treated as the only source of insertion-loss variation.
Three Critical Process Controls for Via Wall Roughness
For high-frequency PCB manufacturing, measuring the copper surface on the board is not enough. The plated hole wall requires independent process monitoring because its surface condition is determined by a different manufacturing sequence.
1. Control the Drilling Process
Mechanical drilling can influence the quality of the hole wall before copper deposition begins.
Drilling speed, feed rate, tool condition, material construction, stackup thickness, and chip evacuation all affect the resulting hole wall. Poor process matching may produce resin smear, glass-fiber damage, tearing, or an irregular hole surface.
Rather than applying one universal spindle speed or feed rate to every FR-4 design, the process should be established according to:
- Drill diameter
- Laminate type and thickness
- Stackup construction
- Tool geometry
- Spindle speed
- Feed rate
- Tool wear
- Number of panels drilled
Cross-sectional inspection should be used to confirm that the drilled hole is suitable for subsequent desmear and copper deposition.
2. Control Micro-Etching Before Copper Deposition
The micro-etch process is intended to remove contaminants and condition the copper surface before electroless copper deposition.
Excessive micro-etching, however, can unnecessarily alter the copper surface and may affect the uniformity of subsequent copper deposition. The correct etch amount depends on the chemistry, copper surface condition, process temperature, immersion time, and supplier-specific process window.
For high-frequency boards, the target should therefore be defined through process capability studies rather than copied as a universal number.
Key parameters include:
- Micro-etch rate
- Actual material removal
- Bath chemistry
- Temperature
- Processing time
- Copper surface morphology
- Bath contamination
- Process-to-process consistency
The objective is to achieve a clean and uniform surface without unnecessarily increasing surface irregularity.
3. Control Electroless and Electrolytic Copper Plating
Copper deposition is one of the most important steps for achieving a uniform and reliable via wall.
The copper layer should provide continuous coverage along the entire hole wall, including the barrel, corners, and transitions between different material structures.
Important manufacturing controls include:
- Copper deposition uniformity
- Plating thickness distribution
- Throwing power
- Current density
- Plating chemistry
- Agitation
- Additive control
- Via aspect ratio
- Hole-wall coverage
- Plating stress
A thicker copper layer does not automatically mean lower high-frequency loss. Excessive plating can affect dimensional control, manufacturability, and cost, while insufficient or nonuniform plating can compromise reliability and electrical performance.
For this reason, copper thickness and plating quality should be optimized together with the actual electrical requirements of the PCB.
Via Wall Roughness and Copper Foil Roughness Are Not the Same
One common engineering mistake is to treat board-surface copper roughness and via wall roughness as the same parameter.
They are physically related to copper but are generated by different manufacturing processes.
Copper foil roughness is primarily determined by the copper foil manufacturing technology and can influence high-frequency conductor loss along the PCB surface. In contrast, via-wall morphology is strongly affected by drilling, desmear, surface conditioning, electroless copper, and electrolytic copper plating.
A PCB can therefore use a relatively low-profile copper foil while still experiencing poor via-wall quality if the hole-processing sequence is not properly controlled.
Conversely, a board with relatively rough copper foil does not necessarily have a poorly plated via.
High-frequency PCB evaluation should therefore distinguish between:
- Surface copper roughness
- Via-wall roughness
- Copper plating thickness
- Plating uniformity
- Hole-wall continuity
- Via transition geometry
This distinction is especially important when analyzing unexpected insertion-loss differences between prototype and production boards.
Why Material Selection Changes the Relative Importance of Via Loss
The influence of via-wall roughness cannot be defined by frequency alone.
Material selection also changes the balance between dielectric and conductor losses. In a low-loss PCB stackup, dielectric loss may be significantly reduced, making conductor loss and discontinuities more visible in the overall channel-loss budget.
This does not mean that via roughness suddenly becomes a fixed multiple more harmful. Instead, its relative contribution to total insertion loss can become more significant because other loss mechanisms have been reduced.
For example, high-frequency laminates with lower dielectric loss may make copper roughness, plating quality, via transitions, and connector discontinuities more important during channel optimization.
For this reason, engineers should evaluate:
- Dk and Df
- Copper roughness
- Via structure
- Plating quality
- Trace geometry
- Transmission-line length
- Differential-pair geometry
- Return-path continuity
- Connector and launch structures
A complete loss budget is more reliable than evaluating one material parameter in isolation.
High-Frequency Via Design Requires Electrical and Manufacturing Verification
For RF and millimeter-wave applications, via geometry should be reviewed together with the PCB stackup and electromagnetic field distribution.
Important design factors include:
- Via diameter
- Pad diameter
- Anti-pad dimensions
- Via stub length
- Back-drilling requirements
- Reference-plane continuity
- Ground-via placement
- Differential-pair spacing
- Return-current path
- Local copper structure
In a differential signal transition, an improperly designed via field can introduce impedance discontinuity even when the plated hole itself has acceptable mechanical quality.
Therefore, PCB design and manufacturing process control must be evaluated together.
Practical Inspection Methods for High-Frequency PCB Vias
When investigating unexpected insertion loss, relying only on AOI or electrical continuity testing may not be sufficient.
A practical verification process can include:
- Cross-sectional analysis
Inspect the hole wall, copper coverage, resin condition, glass-fiber exposure, and plating uniformity. - Microscopic or SEM analysis
For failure analysis, higher-resolution imaging can help identify localized surface morphology and plating defects. - Copper thickness measurement
Confirm whether the plated copper meets the required process specification throughout the hole. - Impedance testing
Use TDR or other appropriate methods to identify discontinuities associated with the via transition. - Insertion-loss measurement
For high-frequency channels, use appropriate test coupons and calibrated measurement methods to separate conductor, dielectric, and transition losses. - Correlation with simulation
Compare measured results with electromagnetic simulation while accounting for actual material properties, copper roughness, via geometry, and manufacturing tolerances.
The test method should be selected according to the operating frequency and required accuracy. A low-frequency measurement cannot necessarily characterize a millimeter-wave transmission path.
Common Mistakes in High-Frequency Via Manufacturing
Several mistakes frequently make high-frequency loss analysis more difficult.
First, using surface copper measurements to represent the entire PCB.
The surface copper may meet its roughness specification while the via wall has a completely different morphology.
Second, focusing only on nominal copper thickness.
Uniformity and plating continuity can be just as important as the nominal thickness value.
Third, treating one roughness value as a universal acceptance limit.
The acceptable roughness depends on frequency, conductor geometry, material, channel-loss budget, and application requirements.
Fourth, ignoring via stubs and return paths.
A well-plated via can still produce significant electrical discontinuity if the via structure itself is poorly designed.
Fifth, relying on a single measurement.
High-frequency failures should be correlated across cross-section analysis, impedance measurements, insertion-loss testing, and manufacturing records whenever possible.
Recommended Process-Control Checklist
For high-frequency PCB projects, engineers can establish a dedicated via-quality checklist covering both manufacturing and electrical performance:
- Define the required via wall roughness or applicable surface-profile specification.
- Specify drilling and tool-management requirements according to the actual laminate and hole geometry.
- Monitor micro-etching through a controlled process window.
- Verify electroless copper continuity before electrolytic plating.
- Monitor copper plating thickness and uniformity.
- Perform cross-sectional inspection on qualification and production samples.
- Distinguish surface copper roughness from via-wall morphology.
- Include via transitions in electromagnetic simulation where appropriate.
- Validate impedance and insertion loss using suitable test structures.
- Correlate manufacturing measurements with electrical test results.
For millimeter-wave designs, production qualification should be based on the actual channel-loss budget rather than a single generic roughness number.
Conclusion
Via wall roughness can become an important contributor to conductor loss and signal-integrity degradation as operating frequency increases. The effect is closely related to skin effect, current redistribution, copper surface morphology, and the electrical structure of the via transition.
However, via-wall roughness should not be considered in isolation. Drilling quality, desmear, micro-etching, copper plating, via geometry, material properties, return paths, and overall channel design all influence the final high-frequency performance.
For RF and millimeter-wave PCBs, the most reliable approach is to combine PCB manufacturing process control with electrical verification. By correlating cross-sectional inspection, copper-plating data, impedance testing, insertion-loss measurements, and electromagnetic simulation, engineers can identify the real source of high-frequency loss and establish a production process that is both electrically stable and manufacturable.
Kingda can support high-frequency PCB projects with controlled material selection, via fabrication, impedance management, and manufacturing verification to help maintain consistent signal performance from prototype to mass production.
