Lamination Voids and Delamination: Causes and Process Control
Delamination and lamination voids are the failure modes that pass every electrical test on the day of manufacture and reappear months later as a blister or a lifted pad. They form when the resin in the prepreg does not completely fill the space it is meant to fill, or when the bond between resin and copper is not strong enough to survive the thermal excursion of assembly.
What a Lamination Void Is
A lamination void is an unfilled region inside the board. It may sit at the interface between a copper feature and the resin, in the corner where a trace meets the laminate, or in a region where the glass cloth did not wet out completely. Voids range from microscopic porosity that only a cross-section reveals to a visible gap that shows up on an ultrasonic scan.
The important distinction is between a void and a delamination. A void is a gap that was never filled. Delamination is a bond that existed and then failed, usually during reflow or thermal cycling. The first is a process problem at lamination, the second is a materials and stress problem, and they need different fixes.
Where the Resin Has to Go
Prepreg is glass cloth impregnated with partially cured resin, and the resin is the part that has to flow. During pressing it must fill the space between traces, occupy the corners around a heavy copper feature and bond to the oxide-treated copper surface. Roughly speaking, the resin volume available must exceed the volume that has to be filled, and the margin shrinks as the copper gets thicker.
A board with one ounce copper and moderate trace density is comfortable. A board with two ounce copper covering most of a layer, or with thick traces running in parallel, is not, and that is where process experience matters.
How Voids Form
The causes fall into a few groups. Insufficient resin volume for the copper density leaves gaps that cannot be filled. Moisture absorbed by the prepreg turns to steam at pressing temperature and pushes the resin aside. Volatile residues from the oxide treatment decompose and form gas. Air trapped during lay-up survives if the press does not pull a good vacuum. A press profile that heats too quickly gels the resin before it has flowed into the pattern.
Contamination belongs in the same list. Oil from handling, dust, or residue from a previous process changes the surface energy of the copper and prevents the resin from wetting it, which produces a void even when every other parameter is correct.
Moisture and the Press Cycle
Prepreg absorbs water from the air, and the amount depends on how it has been stored. Material kept in a sealed bag with desiccant and opened only before lay-up behaves very differently from material left on a shelf for a week. Most shops control this with a defined storage life, a humidity limit, and a drying step before pressing.
The press profile then has to give the resin time to flow before the gel point. Vacuum is applied early so that air and volatiles can escape, pressure is raised while the resin is still fluid, and the cooling phase is controlled so that the cured laminate does not build in unnecessary stress.
Copper Topography and Resin Starvation
Resin starvation is the extreme case of insufficient resin. It occurs when the copper pattern is dense enough that the prepreg has more space to fill than resin to fill it, and it shows up as dry glass cloth and thin dielectric over the traces. The consequence is a thin, weak dielectric with poor breakdown strength and a high risk of delamination at the trace edge.
The remedies are to increase the number of prepreg plies, to specify a higher resin content grade, or to use a flow-fill material designed for heavy copper. Reducing the copper weight on the layer in question is often the simplest answer, and it is worth discussing with the fabricator before the stackup is frozen.
Delamination and Thermal Stress
Delamination happens when the stress at an interface exceeds the bond strength. The stress comes from the mismatch in thermal expansion between copper, resin and glass, and it is amplified by moisture that flashes to steam inside the laminate during reflow. This is why the standard qualification is a solder float or a simulated reflow followed by a microsection, and why the result is quoted as the time to delamination at a given temperature.
A board that survives one reflow may still fail the second, which matters for assemblies with parts on both sides. PCB dimensional stability and expansion explains the coefficients behind these stresses.
Design Choices That Reduce the Risk
Several layout habits make the fabricator’s job easier. Keep the copper distribution balanced between the two halves of the stack so that the panel presses evenly. Avoid isolated large copper areas that have no electrical function; use a thieving pattern instead, so that resin flow is uniform. Keep the gap between adjacent copper features at least as large as the prepreg thickness, and prefer several thin prepreg plies to one thick one, because multiple plies flow better around heavy copper.
Where heavy copper is required, put it on an inner layer if the electrical design allows, because the outer layers have to bond to the surface topography of everything beneath them. Copper plating defects and prevention covers the related problems that appear when the copper surface is not what the plating line expects.
Process Controls at the Fabricator
The controls that matter are unglamorous: prepreg received and stored to specification, with lot and date recorded; a vacuum press with a logged profile; a defined press cycle for each stackup rather than a generic one; control of the resin flow percentage; and a cooling rate that releases stress rather than locking it in. For heavy copper builds, the target is usually expressed as a minimum resin flow, and the panel is sectioned to confirm it.
Oxide treatment deserves its own control point. The oxide has to be rough enough to bond and thin enough not to become a weak layer in its own right, and its chemistry has to be compatible with the prepreg.
Detection and Qualification
Voids and delamination are found by cross-section, by ultrasonic scanning, and by thermal stress testing. Cross-sections are cheap and sample only a few locations, so they can miss a void that occupies a small area. Ultrasonic scanning maps the whole panel and is the appropriate tool for a qualification run or for a heavy-copper design. Thermal stress, either a solder float or a reflow simulation, is what actually predicts whether the board will survive assembly. Multilayer PCB prototype requirements lists the tests worth requesting on a first build.
FAQ
Can a void be repaired? No. A void inside the laminate cannot be filled after the fact, and a board with an internal void should be scrapped or accepted only with a documented concession.
Does baking the boards before assembly help? Yes. A controlled bake removes absorbed moisture and reduces the steam pressure that drives delamination during reflow. The bake profile should follow the laminate manufacturer’s recommendation, not a generic rule.
Why does delamination appear only after the second reflow? Because each thermal cycle adds stress and drives moisture deeper into the interfaces. A marginal bond can survive one pass and fail on the second, which is why qualification should match the number of reflow passes the assembly will actually see.
