PCB Design Release Checklist: DRC, DFM, Gerber, and CAM Review

Routing the last net is not the end of a layout. The work that follows, often called post-processing, is what decides whether the design can be manufactured, tested, and assembled without intervention from the fabricator. Designs that skip this stage usually come back as a request for clarification or, worse, as a board that passes inspection and fails in the field. A disciplined PCB design release checklist converts that work from a set of habits into a repeatable gate.

The checks below are ordered the way they are normally executed, because each one assumes the previous stage is complete. Running a CAM review on artwork that still contains design rule violations simply moves the same error to a different tool.

Start With the Design Rule Check

The first gate is a design rule check configured for the actual technology of the board, not for the CAD tool’s defaults. Trace width and spacing, via-to-trace clearance, pad-to-drill ratios, and copper-to-edge distances should all reflect the stackup that was actually ordered. Running the checker with a looser rule set than the fabricator’s capability produces a clean report and an unbuildable board.

Two categories of violation deserve more attention than the automatic report gives them: opens and shorts caused by copper that is too close or too thin, and isolated copper slivers that will lift or short after etching. Both are geometry problems that a schematic-driven netlist check cannot detect, which is why the rule check must run on the physical database.

It is worth keeping a written record of which rules were deliberately relaxed and why. A deviation that is documented can be reviewed; a deviation that exists only in the CAD configuration file will be rediscovered by the next engineer as a defect.

Run a DFM Check Against the Real Process

A DFM check looks at the design from the perspective of the equipment that will build it, which is a different question from whether the electrical rules are satisfied. Bare board fabrication asks about drill sizes, aspect ratios, annular rings, and panel utilization. Assembly asks about component spacing, orientation, paste aperture geometry, and whether the fiducials and tooling holes exist where the placement machine expects to find them.

The most useful version of this check uses the fabricator’s own capability document rather than a generic rule set, and it is worth requesting their process review before release rather than after. A ten-minute review of a nearly finished design is far cheaper than a redesign triggered by a drill size that cannot be produced at the quoted cost. Design rules that affect production outcomes are collected in PCB design guidelines for manufacturability.

Add Test Points Before, Not After

If the board will be tested in volume, the ICT test point access has to be designed in. A probe pad of approximately 0.99 mm on every net gives the fixture something reliable to contact, and the pads need keep-out from tall components so that the fixture can close. Nets that are inaccessible from the test side, that are covered by a shield, or that sit under a connector will require either a via fan-out to a testable location or an alternative verification method.

Where the density makes full coverage impossible, the decision about which nets to drop should involve the test engineer and be recorded. A board that reaches production with undocumented test gaps tends to accumulate workarounds in the fixture until the test program becomes unreliable.

Boundary scan and built-in self-test can cover interfaces that probing cannot reach, but they only work if the scan chain is designed into the schematic and the necessary access is routed. Both options are decisions made during design, not patches applied during production.

Silkscreen, Reference Designators, and Assembly Documentation

Legible marking reduces assembly and repair errors more than most engineers expect. Reference designators should be consistent in size and orientation, placed so they are not hidden by the component body, and never printed across a pad. Polarity markings on diodes, electrolytic capacitors, and connectors must be visible after assembly, and pin one must be unambiguous on every multi-pin package.

Assembly documentation belongs in the same review. The fabrication drawing needs to state the stackup, the material, the surface finish, the copper weights, and the impedance requirements for each controlled layer. If the impedance target is not documented with a tolerance, the fabricator will choose a geometry that satisfies their process rather than the design’s intent.

Drill Documentation and Layer Naming

The drill file is a manufacturing instruction and should be treated as one. Each drill size needs to be identified, plated and non-plated holes must be separated, and the finished hole sizes must be distinguished from the tool sizes. Where a hole has a specific function, for example a press-fit pin, a mounting screw, or a slot, that requirement belongs in the drill table rather than in a note that the fabricator may not read.

Layer naming matters for the same reason. Ambiguous names such as “signal 3” or “inner 2” invite a mistake during data preparation, while names that state the function and the layer number remove the ambiguity. Consistent naming across a product family also makes it possible to compare revisions without manual inspection.

Gerber File Output and Verification

Every Gerber file set should be checked as a set, not layer by layer. The critical verifications are that the number of layers matches the stackup, that each layer is aligned to the same origin, that the soldermask and paste layers are properly derived, and that the outline layer closes and matches the mechanical drawing dimension.

Generating output is also the point where the panel array is decided. Spacing between boards, the position of tooling and fiducials, and the type of separation all change the manufacturing cost, and the array should be reviewed by the fabricator before tooling is committed.

CAM Review Before Release

The final gate is a CAM review of the files that will actually be used to build the board, because the output process itself can introduce errors. A common failure is a pad that appears correct in the CAD database but is converted into a shape that no longer covers the drill after aperture substitution. Another is a soldermask opening that is too small after the default clearance is applied.

The review should confirm copper-to-drill relationships, verify that the mask and paste apertures follow the intended rules, and check the negative planes for unintended splits. A design that survives this review usually reaches the first article without a revision. General layout quality factors that simplify the review are covered in PCB design quality characteristics.

An Internal Review Workflow

The post-processing stage works best when it is a formal gate rather than a personal routine. The designer runs the self-check and signs off, a second engineer reviews the design against a written checklist and records the result, and the review comments are archived with the design record. Rejected items go back to the designer with a specific instruction rather than a general comment.

Two problem classes deserve explicit checks because they are easy to introduce during last-minute edits. The first is grounding: any change to a split plane, a thermal relief, or a single-point ground connection should be recorded, because these modifications are difficult to spot later and can silently create a return-current discontinuity. The second is cutouts and openings: every window or slot in the board needs a routing keep-out so that a conductor cannot be trimmed into an open circuit during profile machining. Prototype runs are a good place to validate the whole workflow, as described in multilayer PCB prototype requirements.

FAQ

Is a DFM check necessary if the design rule check passed? Yes. The design rule check verifies the electrical and geometric intent of the designer, while the DFM check verifies the design against a specific process. A board can satisfy every internal rule and still contain a drill size, a spacing, or a panel arrangement that the intended fabricator cannot produce economically.

How many test points are enough? One accessible probe pad per net is the target for in-circuit test. Where that is impossible, the nets that lose coverage should be selected deliberately, documented, and covered by another method such as boundary scan or a functional test step, rather than left to chance.

What must the fabrication drawing specify? The stackup and layer sequence, the laminate and its dielectric properties, copper weights, the surface finish, the impedance targets with tolerances, the drill table, and any special requirements such as press-fit holes or controlled-depth cuts. Anything not stated is left to the fabricator’s default, which may not match the design assumption.